#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f72d0d4a |
|
21-Aug-2023 |
Simon Glass <sjg@chromium.org> |
event: Convert existing spy records to simple Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
55171aed |
|
04-May-2023 |
Simon Glass <sjg@chromium.org> |
dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events") Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
7fe32b34 |
|
04-Mar-2022 |
Simon Glass <sjg@chromium.org> |
event: Convert arch_cpu_init_dm() to use events Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
5536f128 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
cbfs: Allow access to CBFS without a header In some cases CBFS does not start with a header but is just a collection of files. It is possible to support this so long as the size of the CBFS is provided. Update the cbfs_init_mem() function to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
0621b5e1 |
|
24-May-2020 |
Simon Glass <sjg@chromium.org> |
cbfs: Don't require the CBFS size with cbfs_init_mem() The size is not actually used since it is present in the header. Drop this parameter. Also tidy up error handling while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
c793dbdb |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Allow skipping init code when chain loading It is useful to be able to boot the same x86 image on a device with or without a first-stage bootloader. For example, with chromebook_coral, it is helpful for testing to be able to boot the same U-Boot (complete with FSP) on bare metal and from coreboot. It allows checking of things like CPU speed, comparing registers, ACPI tables and the like. When U-Boot is not the first-stage bootloader much of this code is not needed and can break booting. Add checks for this to the FSP code. Rather than checking for the amount of available SDRAM, just use 1GB in this situation, which should be safe. Using 2GB may run into a memory hole on some SoCs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cf87d3b5 |
|
06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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cf87d3b5 |
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06-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: fsp: Add FSP2 base support Add support for some important configuration options and FSP memory init. The memory init uses swizzle tables from the device tree. Support for the FSP_S binary is also included. Bootstage timing is used for both FSP_M and FSP_S and memory-mapped SPI reads. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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