#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
236f2ec4 |
|
20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
17753b03 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot timestamp info into coreboot_tables.h This all relates to the sysinfo structure provided by coreboot. Put the timestamp definitions into the same file as the others. Tidy up a few comments at the same time. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e35b6497 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: Make coreboot sysinfo available to any x86 board It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
28314054 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Correct wording of coreboot source code Some files are taken or modified from coreboot, but the files are no-longer part of the coreboot project. Fix the wording in a few places. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
80af3984 |
|
13-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert to use driver model timer Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5c564b0d |
|
06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: coreboot: Set up timer base correctly If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value of base_time in coreboot's timestamp table as our timer base, otherwise TSC counter value will be used. Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS, the value of base_time in the timestamp table is still zero, so we must exclude this case too (this is currently seen on booting coreboot in qemu). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5397d805 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support adding coreboot timestanps to bootstage Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e761ecdb |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add TSC timer This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6dbe0cce |
|
23-Oct-2012 |
Vadim Bendebury <vbendeb@chromium.org> |
x86: Enable coreboot timestamp facility support in u-boot. This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
236f2ec4 |
|
20-May-2021 |
Marek Behún <kabel@kernel.org> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
17753b03 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot timestamp info into coreboot_tables.h This all relates to the sysinfo structure provided by coreboot. Put the timestamp definitions into the same file as the others. Tidy up a few comments at the same time. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e35b6497 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: Make coreboot sysinfo available to any x86 board It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
28314054 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Correct wording of coreboot source code Some files are taken or modified from coreboot, but the files are no-longer part of the coreboot project. Fix the wording in a few places. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
80af3984 |
|
13-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert to use driver model timer Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5c564b0d |
|
06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: coreboot: Set up timer base correctly If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value of base_time in coreboot's timestamp table as our timer base, otherwise TSC counter value will be used. Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS, the value of base_time in the timestamp table is still zero, so we must exclude this case too (this is currently seen on booting coreboot in qemu). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5397d805 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support adding coreboot timestanps to bootstage Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e761ecdb |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add TSC timer This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6dbe0cce |
|
23-Oct-2012 |
Vadim Bendebury <vbendeb@chromium.org> |
x86: Enable coreboot timestamp facility support in u-boot. This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
236f2ec4 |
|
20-May-2021 |
Marek Behún <marek.behun@nic.cz> |
treewide: Convert macro and uses of __section(foo) to __section("foo") This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
17753b03 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot timestamp info into coreboot_tables.h This all relates to the sysinfo structure provided by coreboot. Put the timestamp definitions into the same file as the others. Tidy up a few comments at the same time. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e35b6497 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: Make coreboot sysinfo available to any x86 board It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
28314054 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Correct wording of coreboot source code Some files are taken or modified from coreboot, but the files are no-longer part of the coreboot project. Fix the wording in a few places. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
80af3984 |
|
13-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert to use driver model timer Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5c564b0d |
|
06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: coreboot: Set up timer base correctly If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value of base_time in coreboot's timestamp table as our timer base, otherwise TSC counter value will be used. Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS, the value of base_time in the timestamp table is still zero, so we must exclude this case too (this is currently seen on booting coreboot in qemu). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5397d805 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support adding coreboot timestanps to bootstage Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e761ecdb |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add TSC timer This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6dbe0cce |
|
23-Oct-2012 |
Vadim Bendebury <vbendeb@chromium.org> |
x86: Enable coreboot timestamp facility support in u-boot. This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
17753b03 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: Move coreboot timestamp info into coreboot_tables.h This all relates to the sysinfo structure provided by coreboot. Put the timestamp definitions into the same file as the others. Tidy up a few comments at the same time. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e35b6497 |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: Make coreboot sysinfo available to any x86 board It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
28314054 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Correct wording of coreboot source code Some files are taken or modified from coreboot, but the files are no-longer part of the coreboot project. Fix the wording in a few places. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
80af3984 |
|
13-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert to use driver model timer Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5c564b0d |
|
06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: coreboot: Set up timer base correctly If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value of base_time in coreboot's timestamp table as our timer base, otherwise TSC counter value will be used. Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS, the value of base_time in the timestamp table is still zero, so we must exclude this case too (this is currently seen on booting coreboot in qemu). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5397d805 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support adding coreboot timestanps to bootstage Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e761ecdb |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add TSC timer This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6dbe0cce |
|
23-Oct-2012 |
Vadim Bendebury <vbendeb@chromium.org> |
x86: Enable coreboot timestamp facility support in u-boot. This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
28314054 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Correct wording of coreboot source code Some files are taken or modified from coreboot, but the files are no-longer part of the coreboot project. Fix the wording in a few places. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
80af3984 |
|
13-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert to use driver model timer Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5c564b0d |
|
06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: coreboot: Set up timer base correctly If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value of base_time in coreboot's timestamp table as our timer base, otherwise TSC counter value will be used. Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS, the value of base_time in the timestamp table is still zero, so we must exclude this case too (this is currently seen on booting coreboot in qemu). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5397d805 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support adding coreboot timestanps to bootstage Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e761ecdb |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add TSC timer This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6dbe0cce |
|
23-Oct-2012 |
Vadim Bendebury <vbendeb@chromium.org> |
x86: Enable coreboot timestamp facility support in u-boot. This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
28314054 |
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08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Correct wording of coreboot source code Some files are taken or modified from coreboot, but the files are no-longer part of the coreboot project. Fix the wording in a few places. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
80af3984 |
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13-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert to use driver model timer Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5c564b0d |
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06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: coreboot: Set up timer base correctly If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value of base_time in coreboot's timestamp table as our timer base, otherwise TSC counter value will be used. Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS, the value of base_time in the timestamp table is still zero, so we must exclude this case too (this is currently seen on booting coreboot in qemu). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
5397d805 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support adding coreboot timestanps to bootstage Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e761ecdb |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add TSC timer This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6dbe0cce |
|
23-Oct-2012 |
Vadim Bendebury <vbendeb@chromium.org> |
x86: Enable coreboot timestamp facility support in u-boot. This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
80af3984 |
|
13-Nov-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert to use driver model timer Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
|
#
5c564b0d |
|
06-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: coreboot: Set up timer base correctly If coreboot is built with CONFIG_COLLECT_TIMESTAMPS, use the value of base_time in coreboot's timestamp table as our timer base, otherwise TSC counter value will be used. Sometimes even coreboot is built with CONFIG_COLLECT_TIMESTAMPS, the value of base_time in the timestamp table is still zero, so we must exclude this case too (this is currently seen on booting coreboot in qemu). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
|
#
5397d805 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support adding coreboot timestanps to bootstage Coreboot provides a lot of useful timing information. Provide a facility to add this to bootstage on start-up. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e761ecdb |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add TSC timer This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
6dbe0cce |
|
23-Oct-2012 |
Vadim Bendebury <vbendeb@chromium.org> |
x86: Enable coreboot timestamp facility support in u-boot. This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
|