#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e2adc369 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename some FSP functions to have an fsp_ prefix Given these exported function an fsp_ prefix since they are declared in an fsp.h header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83311886 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename existing FSP code to fsp1 Since there is now a new version of the FSP and it is incompatible with the existing version, move the code into an fsp1 directory. This will allow us to put FSP v2 code into an fsp2 directory. Add a Kconfig which defines which version is in use. Some of the code in this new fsp1/ directory is generic across both FSPv1 and FSPv2. Future patches will address this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
83262f99 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Move Azalia update codes to board Azalia configuration may be different across boards, hence it's not appropriate to do that in the SoC level. Instead, let's make the SoC update_fsp_azalia_configs() routine as a weak version, and do the actual work in the board codes. So far it seems only som-db5800-som-6867 board enables the Azalia. Move the original codes into som-db5800-som-6867.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f6859558 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Use a function to update the Azalia config pointer At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
abddcd52 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Consolidate Azalia header file So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f8f291b0 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
5e74e5a6 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Use macros instead of magic numbers for FSP settings Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6702488c |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Remove "serial-debug-port-*" settings "serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
455a5a80 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1 The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
214feec1 |
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10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Set up init runtime buffer in update_fsp_configs() fsp_init() runtime buffer parameter might be different across different platforms. Move this to update_fsp_configs(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
81f84aa6 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Rename update_fsp_upd() and change its signature To support platform-specific configurations (might not always be UPD on some platform), use a better name update_fsp_configs() and accepct struct fsp_config_data as its parameter so that platform codes can handle whatever configuration data for that FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3a1a18ff |
|
27-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Add support for Intel Minnowboard Max This is a relatively low-cost x86 board in a small form factor. The main peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800 series CPU. So far only the dual core 2GB variant is supported. This uses the existing FSP support. Binary blobs are required to make this board work. The microcode update is included as a patch (all 3000 lines of it). Change-Id: I0088c47fe87cf08ae635b343d32c332269062156 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e2adc369 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename some FSP functions to have an fsp_ prefix Given these exported function an fsp_ prefix since they are declared in an fsp.h header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83311886 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename existing FSP code to fsp1 Since there is now a new version of the FSP and it is incompatible with the existing version, move the code into an fsp1 directory. This will allow us to put FSP v2 code into an fsp2 directory. Add a Kconfig which defines which version is in use. Some of the code in this new fsp1/ directory is generic across both FSPv1 and FSPv2. Future patches will address this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
83262f99 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Move Azalia update codes to board Azalia configuration may be different across boards, hence it's not appropriate to do that in the SoC level. Instead, let's make the SoC update_fsp_azalia_configs() routine as a weak version, and do the actual work in the board codes. So far it seems only som-db5800-som-6867 board enables the Azalia. Move the original codes into som-db5800-som-6867.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f6859558 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Use a function to update the Azalia config pointer At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
abddcd52 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Consolidate Azalia header file So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f8f291b0 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
5e74e5a6 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Use macros instead of magic numbers for FSP settings Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6702488c |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Remove "serial-debug-port-*" settings "serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
455a5a80 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1 The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
214feec1 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Set up init runtime buffer in update_fsp_configs() fsp_init() runtime buffer parameter might be different across different platforms. Move this to update_fsp_configs(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
81f84aa6 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Rename update_fsp_upd() and change its signature To support platform-specific configurations (might not always be UPD on some platform), use a better name update_fsp_configs() and accepct struct fsp_config_data as its parameter so that platform codes can handle whatever configuration data for that FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3a1a18ff |
|
27-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Add support for Intel Minnowboard Max This is a relatively low-cost x86 board in a small form factor. The main peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800 series CPU. So far only the dual core 2GB variant is supported. This uses the existing FSP support. Binary blobs are required to make this board work. The microcode update is included as a patch (all 3000 lines of it). Change-Id: I0088c47fe87cf08ae635b343d32c332269062156 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e2adc369 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename some FSP functions to have an fsp_ prefix Given these exported function an fsp_ prefix since they are declared in an fsp.h header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83311886 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename existing FSP code to fsp1 Since there is now a new version of the FSP and it is incompatible with the existing version, move the code into an fsp1 directory. This will allow us to put FSP v2 code into an fsp2 directory. Add a Kconfig which defines which version is in use. Some of the code in this new fsp1/ directory is generic across both FSPv1 and FSPv2. Future patches will address this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
83262f99 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Move Azalia update codes to board Azalia configuration may be different across boards, hence it's not appropriate to do that in the SoC level. Instead, let's make the SoC update_fsp_azalia_configs() routine as a weak version, and do the actual work in the board codes. So far it seems only som-db5800-som-6867 board enables the Azalia. Move the original codes into som-db5800-som-6867.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f6859558 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Use a function to update the Azalia config pointer At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
abddcd52 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Consolidate Azalia header file So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f8f291b0 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
5e74e5a6 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Use macros instead of magic numbers for FSP settings Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6702488c |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Remove "serial-debug-port-*" settings "serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
455a5a80 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1 The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
214feec1 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Set up init runtime buffer in update_fsp_configs() fsp_init() runtime buffer parameter might be different across different platforms. Move this to update_fsp_configs(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
81f84aa6 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Rename update_fsp_upd() and change its signature To support platform-specific configurations (might not always be UPD on some platform), use a better name update_fsp_configs() and accepct struct fsp_config_data as its parameter so that platform codes can handle whatever configuration data for that FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3a1a18ff |
|
27-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Add support for Intel Minnowboard Max This is a relatively low-cost x86 board in a small form factor. The main peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800 series CPU. So far only the dual core 2GB variant is supported. This uses the existing FSP support. Binary blobs are required to make this board work. The microcode update is included as a patch (all 3000 lines of it). Change-Id: I0088c47fe87cf08ae635b343d32c332269062156 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e2adc369 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename some FSP functions to have an fsp_ prefix Given these exported function an fsp_ prefix since they are declared in an fsp.h header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83311886 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename existing FSP code to fsp1 Since there is now a new version of the FSP and it is incompatible with the existing version, move the code into an fsp1 directory. This will allow us to put FSP v2 code into an fsp2 directory. Add a Kconfig which defines which version is in use. Some of the code in this new fsp1/ directory is generic across both FSPv1 and FSPv2. Future patches will address this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
83262f99 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Move Azalia update codes to board Azalia configuration may be different across boards, hence it's not appropriate to do that in the SoC level. Instead, let's make the SoC update_fsp_azalia_configs() routine as a weak version, and do the actual work in the board codes. So far it seems only som-db5800-som-6867 board enables the Azalia. Move the original codes into som-db5800-som-6867.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f6859558 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Use a function to update the Azalia config pointer At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
abddcd52 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Consolidate Azalia header file So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f8f291b0 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
5e74e5a6 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Use macros instead of magic numbers for FSP settings Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6702488c |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Remove "serial-debug-port-*" settings "serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
455a5a80 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1 The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
214feec1 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Set up init runtime buffer in update_fsp_configs() fsp_init() runtime buffer parameter might be different across different platforms. Move this to update_fsp_configs(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
81f84aa6 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Rename update_fsp_upd() and change its signature To support platform-specific configurations (might not always be UPD on some platform), use a better name update_fsp_configs() and accepct struct fsp_config_data as its parameter so that platform codes can handle whatever configuration data for that FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3a1a18ff |
|
27-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Add support for Intel Minnowboard Max This is a relatively low-cost x86 board in a small form factor. The main peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800 series CPU. So far only the dual core 2GB variant is supported. This uses the existing FSP support. Binary blobs are required to make this board work. The microcode update is included as a patch (all 3000 lines of it). Change-Id: I0088c47fe87cf08ae635b343d32c332269062156 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
e2adc369 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename some FSP functions to have an fsp_ prefix Given these exported function an fsp_ prefix since they are declared in an fsp.h header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83311886 |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Rename existing FSP code to fsp1 Since there is now a new version of the FSP and it is incompatible with the existing version, move the code into an fsp1 directory. This will allow us to put FSP v2 code into an fsp2 directory. Add a Kconfig which defines which version is in use. Some of the code in this new fsp1/ directory is generic across both FSPv1 and FSPv2. Future patches will address this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
83262f99 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Move Azalia update codes to board Azalia configuration may be different across boards, hence it's not appropriate to do that in the SoC level. Instead, let's make the SoC update_fsp_azalia_configs() routine as a weak version, and do the actual work in the board codes. So far it seems only som-db5800-som-6867 board enables the Azalia. Move the original codes into som-db5800-som-6867.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f6859558 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Use a function to update the Azalia config pointer At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
abddcd52 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Consolidate Azalia header file So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
f8f291b0 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
5e74e5a6 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Use macros instead of magic numbers for FSP settings Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6702488c |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Remove "serial-debug-port-*" settings "serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
455a5a80 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1 The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
214feec1 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Set up init runtime buffer in update_fsp_configs() fsp_init() runtime buffer parameter might be different across different platforms. Move this to update_fsp_configs(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
81f84aa6 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Rename update_fsp_upd() and change its signature To support platform-specific configurations (might not always be UPD on some platform), use a better name update_fsp_configs() and accepct struct fsp_config_data as its parameter so that platform codes can handle whatever configuration data for that FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3a1a18ff |
|
27-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Add support for Intel Minnowboard Max This is a relatively low-cost x86 board in a small form factor. The main peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800 series CPU. So far only the dual core 2GB variant is supported. This uses the existing FSP support. Binary blobs are required to make this board work. The microcode update is included as a patch (all 3000 lines of it). Change-Id: I0088c47fe87cf08ae635b343d32c332269062156 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
83262f99 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Move Azalia update codes to board Azalia configuration may be different across boards, hence it's not appropriate to do that in the SoC level. Instead, let's make the SoC update_fsp_azalia_configs() routine as a weak version, and do the actual work in the board codes. So far it seems only som-db5800-som-6867 board enables the Azalia. Move the original codes into som-db5800-som-6867.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
|
#
f6859558 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: fsp: Use a function to update the Azalia config pointer At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
|
#
abddcd52 |
|
13-Oct-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Consolidate Azalia header file So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
|
#
f8f291b0 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
5e74e5a6 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Use macros instead of magic numbers for FSP settings Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
6702488c |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Remove "serial-debug-port-*" settings "serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
455a5a80 |
|
31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1 The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
214feec1 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Set up init runtime buffer in update_fsp_configs() fsp_init() runtime buffer parameter might be different across different platforms. Move this to update_fsp_configs(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
|
#
81f84aa6 |
|
10-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: fsp: Rename update_fsp_upd() and change its signature To support platform-specific configurations (might not always be UPD on some platform), use a better name update_fsp_configs() and accepct struct fsp_config_data as its parameter so that platform codes can handle whatever configuration data for that FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
|
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
3a1a18ff |
|
27-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Add support for Intel Minnowboard Max This is a relatively low-cost x86 board in a small form factor. The main peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800 series CPU. So far only the dual core 2GB variant is supported. This uses the existing FSP support. Binary blobs are required to make this board work. The microcode update is included as a patch (all 3000 lines of it). Change-Id: I0088c47fe87cf08ae635b343d32c332269062156 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|