#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9a8942b5 |
|
11-Feb-2020 |
Tom Rini <trini@konsulko.com> |
Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm sandbox conversion to SDL2 TPM TEE driver Various minor sandbox video enhancements New driver model core utility functions
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
e51478ba |
|
27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> |
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9a8942b5 |
|
11-Feb-2020 |
Tom Rini <trini@konsulko.com> |
Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm sandbox conversion to SDL2 TPM TEE driver Various minor sandbox video enhancements New driver model core utility functions
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1da448bb |
|
04-Nov-2020 |
Simon Glass <sjg@chromium.org> |
x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
96bf9be8 |
|
22-Sep-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Check low-level init in FSP-S pre-init If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
b95611f6 |
|
16-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Fix save/restore of ITSS priorities The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
f549d9bb |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Support set_hide() in p2sb driver Add support for this new method in the driver and in the fsp-s setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
|
#
eb2ebbcf |
|
07-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Use memory-mapped access for VBT Use the new binman memory-mapping function to access the VBT, to simplify the code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ef5f5f6c |
|
09-Jul-2020 |
Simon Glass <sjg@chromium.org> |
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME At present this enables a few arch-specific members of the global_data struct which are otherwise not part of the struct. As a result we have to use #ifdef in various places. The cost of always having these in the struct is small. Adjust things so that we can use compile-time code instead of #ifdefs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
d9e7efe1 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Use devicetree for FSP-S configuration A the moment the FSP-S configuration is a mix of hard coded values and devicetree properties. This patch makes FSP-S full configurable from devicetree by adding binding properties for all FSP-S parameters. Co-developed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
832fee86 |
|
17-May-2020 |
Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> |
x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled Only load VBT if it's present in the u-boot.rom. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> (Tested on coral) Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52f24238 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop bootstage.h from common header Move this fairly uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
52b9beb5 |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Skip init code when chain loading When U-Boot is not the first-stage bootloader the FSP-S init must be skipped. Update it to add a check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
3cabcf96 |
|
08-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: Move acpi_s3.h to include/acpi/ This header relates to ACPI and we are about to add some more ACPI headers. Move this one into a new directory so they are together. The header inclusion in pci_rom.c is not specific to x86 anymore, so drop the #ifdef CONFIG_X86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
69c2dc93 |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: Give each driver an IRQ type Add an IRQ type to each driver and use irq_first_device_type() to find and probe the correct one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
eb8af95f |
|
06-Feb-2020 |
Simon Glass <sjg@chromium.org> |
x86: apl: Drop the I2C config in FSP-S This config is not actually used here and in U-Boot it seems better to set this using the device tree for each individual controller. The monolithic config of the FSP-S is only necessary if the FSP is actually configuring something, but here it is not. The FSP-S does enable/disable the various I2C ports. It might be nice to handle this using the okay/disabled property of each port, but that can be considered later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
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08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
2153e8fb |
|
08-Dec-2019 |
Simon Glass <sjg@chromium.org> |
x86: apl: Add FSP support The memory and silicon init parts of the FSP need support code to work. Add this for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|