History log of /u-boot/arch/riscv/cpu/jh7110/dram.c
Revision Date Author Comments
(<<< Hide modified files)
(Show modified files >>>)
# 0b9441ae 12-Oct-2023 Tom Rini <trini@konsulko.com>

riscv: Remove common.h usage

We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>


/u-boot/arch/riscv/cpu/jh7110/dram.c
# d768dd88 12-Aug-2023 Heinrich Schuchardt <xypron.glpk@gmx.de>

common: return type board_get_usable_ram_top

board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>


/u-boot/arch/riscv/cpu/jh7110/dram.c
# 21853415 28-Mar-2023 Yanhong Wang <yanhong.wang@starfivetech.com>

riscv: cpu: jh7110: Add support for jh7110 SoC

Add StarFive JH7110 SoC to support RISC-V arch.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>


/u-boot/arch/riscv/cpu/jh7110/dram.c
# d768dd88 12-Aug-2023 Heinrich Schuchardt <xypron.glpk@gmx.de>

common: return type board_get_usable_ram_top

board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>


/u-boot/arch/riscv/cpu/jh7110/dram.c
# 21853415 28-Mar-2023 Yanhong Wang <yanhong.wang@starfivetech.com>

riscv: cpu: jh7110: Add support for jh7110 SoC

Add StarFive JH7110 SoC to support RISC-V arch.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>


/u-boot/arch/riscv/cpu/jh7110/dram.c
# 21853415 28-Mar-2023 Yanhong Wang <yanhong.wang@starfivetech.com>

riscv: cpu: jh7110: Add support for jh7110 SoC

Add StarFive JH7110 SoC to support RISC-V arch.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>


/u-boot/arch/riscv/cpu/jh7110/dram.c