#
0b9441ae |
|
12-Oct-2023 |
Tom Rini <trini@konsulko.com> |
riscv: Remove common.h usage We can remove common.h from most cases of the code here, and only a few places need an additional header instead. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ed1475e2 |
|
16-Apr-2020 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: qemu: Remove the simple-bus driver for the SoC node Prior to QEMU v3.1.0, QEMU generated the 'virt' SoC node with a "riscv-virtio-soc" compatible string, and a "simple-bus" driver was created to accommodate that special case in U-Boot. Starting from QEMU v3.1.0, the SoC node was set as a "simple-bus", hence the special simple-bus driver is no longer needed. Update the doc to mention the latest tested QEMU version 4.2.0. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
36bf446b |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move enable/disable_interrupts out of common.h Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
fdff1f96 |
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25-Feb-2019 |
Anup Patel <anup@brainfault.org> |
riscv: Rename cpu/qemu to cpu/generic The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ed1475e2 |
|
16-Apr-2020 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: qemu: Remove the simple-bus driver for the SoC node Prior to QEMU v3.1.0, QEMU generated the 'virt' SoC node with a "riscv-virtio-soc" compatible string, and a "simple-bus" driver was created to accommodate that special case in U-Boot. Starting from QEMU v3.1.0, the SoC node was set as a "simple-bus", hence the special simple-bus driver is no longer needed. Update the doc to mention the latest tested QEMU version 4.2.0. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
36bf446b |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move enable/disable_interrupts out of common.h Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
fdff1f96 |
|
25-Feb-2019 |
Anup Patel <Anup.Patel@wdc.com> |
riscv: Rename cpu/qemu to cpu/generic The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
ed1475e2 |
|
16-Apr-2020 |
Bin Meng <bmeng.cn@gmail.com> |
riscv: qemu: Remove the simple-bus driver for the SoC node Prior to QEMU v3.1.0, QEMU generated the 'virt' SoC node with a "riscv-virtio-soc" compatible string, and a "simple-bus" driver was created to accommodate that special case in U-Boot. Starting from QEMU v3.1.0, the SoC node was set as a "simple-bus", hence the special simple-bus driver is no longer needed. Update the doc to mention the latest tested QEMU version 4.2.0. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
36bf446b |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move enable/disable_interrupts out of common.h Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
fdff1f96 |
|
25-Feb-2019 |
Anup Patel <Anup.Patel@wdc.com> |
riscv: Rename cpu/qemu to cpu/generic The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
36bf446b |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move enable/disable_interrupts out of common.h Move these two functions into the irq_funcs.h header file. Also move interrupt_handler_t as this is used by the irq_install_handler() function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
fdff1f96 |
|
25-Feb-2019 |
Anup Patel <Anup.Patel@wdc.com> |
riscv: Rename cpu/qemu to cpu/generic The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
fdff1f96 |
|
25-Feb-2019 |
Anup Patel <Anup.Patel@wdc.com> |
riscv: Rename cpu/qemu to cpu/generic The QEMU CPU support under arch/riscv is pretty much generic and works fine for SiFive Unleashed as well. In fact, there will be quite a few RISC-V SOCs for which QEMU CPU support will work fine. This patch renames cpu/qemu to cpu/generic to indicate the above fact. If there are SOC specific errata workarounds required in cpu/generic then those can be done at runtime in cpu/generic based on CPU vendor specific DT compatible string. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |