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62c5fae5 |
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03-May-2023 |
Christophe Leroy <christophe.leroy@csgroup.eu> |
powerpc: mpc885: Add CPM USB-SOF microcode for CPM15 ERRATA MPC885 CPU has the following ERRATA: When the USB controller is configured in Host mode, and the SOF generation (SFTE=1 in USMOD register) is being used, there may be false CRC error indication in other SCCs. Although the data is received correctly, the CRC result will be corrupted. Add capability to load the related microcode to fix it. The microcode binary data is copied from Linux kernel. Other microcode will be added in following patch so make it a Kconfig choice. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> |
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bebb8dfa |
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04-May-2023 |
Christophe Leroy <christophe.leroy@csgroup.eu> |
powerpc: mpc8xx: Reorganise init RAM Using SMC relocation microcode patch or USB-SOF microcode patch will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00 to 0x3000. At the time being, init RAM is setup to use 0x2800-0x2e00, but the stack pointer goes beyond 0x2800 and even beyond 0x2400. For the time being we are not going to use any microcode patch that uses memory about 0x3000, so reorganise setup to use: - 0x2800 - 0x2e00 for init malloc and global data and CPM buffers - 0x3000 - 0x3c00 for init stack For more details about CPM dual port ram, see commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram") Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> |
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fdd243d8 |
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03-May-2023 |
Christophe Leroy <christophe.leroy@csgroup.eu> |
powerpc: mpc8xx: CPM parameter RAM can be anywhere With relocation, CPM parameter RAM can be anywhere in the dual port RAM, so don't split dual port RAM. Remove dparam and dparam16 members of struct comm_proc PROFF_XXX become offsets from the start of dual port RAM, then they are now consistant with the offsets in RPBASE registers. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> |
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b1d62424 |
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16-Mar-2018 |
Christophe Leroy <christophe.leroy@c-s.fr> |
powerpc: mpc8xx: redistribute data in CPM dpram Some malloc memory is needed at startup for DM model. Lets reorganise the use of the CPM dpram. The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as: IMMR + 0x2000..0x2800: BD/Data/Microcode IMMR + 0x2800..0x2e00: BD/Data IMMR + 0x2e00..0x3800: BD/Data/Microcode IMMR + 0x3800..0x3a00: BD/Data IMMR + 0x3a00..0x3c00: BD/Data/Microcode IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers Lets reallocate all BDs in the 3800..3a00 area and give the full 2800..2e00 for dynamic RAM allocation including global data That way, the microcode areas remain available if needed one day. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> |
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18f8d4c6 |
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16-Mar-2018 |
Christophe Leroy <christophe.leroy@c-s.fr> |
powercp: mpc8xx: move commproc.h include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and move it into arch/powerpc/include/asm Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> |
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b1d62424 |
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16-Mar-2018 |
Christophe Leroy <christophe.leroy@c-s.fr> |
powerpc: mpc8xx: redistribute data in CPM dpram Some malloc memory is needed at startup for DM model. Lets reorganise the use of the CPM dpram. The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as: IMMR + 0x2000..0x2800: BD/Data/Microcode IMMR + 0x2800..0x2e00: BD/Data IMMR + 0x2e00..0x3800: BD/Data/Microcode IMMR + 0x3800..0x3a00: BD/Data IMMR + 0x3a00..0x3c00: BD/Data/Microcode IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers Lets reallocate all BDs in the 3800..3a00 area and give the full 2800..2e00 for dynamic RAM allocation including global data That way, the microcode areas remain available if needed one day. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
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18f8d4c6 |
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16-Mar-2018 |
Christophe Leroy <christophe.leroy@c-s.fr> |
powercp: mpc8xx: move commproc.h include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and move it into arch/powerpc/include/asm Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
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