#
65cc0e2a |
|
16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
a0759684 |
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19-Sep-2022 |
Marek Behún <kabel@kernel.org> |
powerpc: mpc85xx: Fix incorrect application of patch I messed up application of patch 5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS"). I took it from a work-in-progress branch where I changed usage of CONFIG_SDCARD to CONFIG_SD_BOOT and refactored SYS_MPC85XX_NO_RESETVEC mess. But these changes aren't in master yet. Fix the wrong usage of these macros. Fixes: 5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS") Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Pali Rohár <pali@kernel.org> |
#
5a428e75 |
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05-Aug-2022 |
Pali Rohár <pali@kernel.org> |
mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then expects that U-Boot proper is placed immediately after SPL without any additional padding. This allows to generate smaller SPL+U-Boot final binary as it is not required to specify fixed offset to U-Boot proper at SPL compile time. In this case offset to U-Boot proper is calculated at SPL compile time in linker script. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Marek Behún <kabel@kernel.org> |
#
7696b80e |
|
05-Aug-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Fix loading U-Boot proper from SD card in SPL Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy trims trailing zero bytes when converting ELF file to RAW binary. This is same fix for SPL linker script as was done fix for U-Boot linker script in commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support"). It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> |
#
786d9f1a |
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11-May-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector QorIQ U-Boot binary for SD card booting compiled during build process (either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot BootROM requires that image on SD card must contain special boot sector. Implement support for generating this special boot sector directly in U-Boot start code. Boot sector needs to be at the beginning of the image, so when compiling only proper U-Boot without SPL then it needs to be in proper U-Boot. When compiling SPL with proper U-Boot then it needs to be only in SPL. Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR. Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot image could be stored on the SD card. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
de47ff53 |
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10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig This converts the following to Kconfig: CONFIG_SYS_MPC85XX_NO_RESETVEC Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c0f47562 |
|
16-Jun-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are manually increased by 0x1000 due to .bootpg section. This section has size of 0x1000 bytes and is manually put by linker script before .text section (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Due to this fact lot of other config options are manually increased by 0x1000 value to make correct layout. Note that entry point is not on CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Put .bootpg code directly into .text section and move text base address to the start of .bootpg code. And finally remove +0x1000 value from lot of config options. With this removal custom PHDRS is not used anymore, so remove it too. After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at address -0x1000 anymore. Tested on P2020 board with SPL and proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
99e2fbcb |
|
30-May-2022 |
Andrew Scull <ascull@google.com> |
linker_lists: Rename sections to remove . prefix Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1245c6e2 |
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05-Apr-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Define linker sections in ascending order It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2f41ade7 |
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22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
#
a6d6812a |
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22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4d3294b1 |
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03-Sep-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
522b021a |
|
24-Oct-2015 |
Zhenhua Luo <zhenhua.luo@freescale.com> |
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> |
#
6f2ed0e9 |
|
27-Apr-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
651fcf60 |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Add support of SPL non-relocation Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
49efe85b |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: Avoid hardcoding in SPL linker script SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
6609916e |
|
09-Jan-2014 |
Po Liu <po.liu@freescale.com> |
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
81b867aa |
|
04-Sep-2013 |
Ying Zhang <b40530@freescale.com> |
SPL: P1022DS: switch to new multibus/multiadapter support - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com> |
#
bb0dc108 |
|
16-Aug-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc: mpc85xx: Support booting from SD Card with SPL The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
67ad0d52 |
|
07-Jun-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
5df572f0 |
|
20-May-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: support application without resetvec segment in the linker script For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3a88179d |
|
16-Apr-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: new SPL support for IFC NAND Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3929fb0a |
|
14-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Replace __bss_end__ with __bss_end Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c97cd1ba |
|
20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
spl/85xx: new SPL support Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com> |
#
a0759684 |
|
19-Sep-2022 |
Marek Behún <kabel@kernel.org> |
powerpc: mpc85xx: Fix incorrect application of patch I messed up application of patch 5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS"). I took it from a work-in-progress branch where I changed usage of CONFIG_SDCARD to CONFIG_SD_BOOT and refactored SYS_MPC85XX_NO_RESETVEC mess. But these changes aren't in master yet. Fix the wrong usage of these macros. Fixes: 5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS") Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Pali Rohár <pali@kernel.org> |
#
5a428e75 |
|
05-Aug-2022 |
Pali Rohár <pali@kernel.org> |
mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then expects that U-Boot proper is placed immediately after SPL without any additional padding. This allows to generate smaller SPL+U-Boot final binary as it is not required to specify fixed offset to U-Boot proper at SPL compile time. In this case offset to U-Boot proper is calculated at SPL compile time in linker script. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Marek Behún <kabel@kernel.org> |
#
7696b80e |
|
05-Aug-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Fix loading U-Boot proper from SD card in SPL Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy trims trailing zero bytes when converting ELF file to RAW binary. This is same fix for SPL linker script as was done fix for U-Boot linker script in commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support"). It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> |
#
786d9f1a |
|
11-May-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector QorIQ U-Boot binary for SD card booting compiled during build process (either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot BootROM requires that image on SD card must contain special boot sector. Implement support for generating this special boot sector directly in U-Boot start code. Boot sector needs to be at the beginning of the image, so when compiling only proper U-Boot without SPL then it needs to be in proper U-Boot. When compiling SPL with proper U-Boot then it needs to be only in SPL. Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR. Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot image could be stored on the SD card. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
de47ff53 |
|
10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig This converts the following to Kconfig: CONFIG_SYS_MPC85XX_NO_RESETVEC Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c0f47562 |
|
16-Jun-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are manually increased by 0x1000 due to .bootpg section. This section has size of 0x1000 bytes and is manually put by linker script before .text section (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Due to this fact lot of other config options are manually increased by 0x1000 value to make correct layout. Note that entry point is not on CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Put .bootpg code directly into .text section and move text base address to the start of .bootpg code. And finally remove +0x1000 value from lot of config options. With this removal custom PHDRS is not used anymore, so remove it too. After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at address -0x1000 anymore. Tested on P2020 board with SPL and proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
99e2fbcb |
|
30-May-2022 |
Andrew Scull <ascull@google.com> |
linker_lists: Rename sections to remove . prefix Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1245c6e2 |
|
05-Apr-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Define linker sections in ascending order It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2f41ade7 |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
#
a6d6812a |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4d3294b1 |
|
03-Sep-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
522b021a |
|
24-Oct-2015 |
Zhenhua Luo <zhenhua.luo@freescale.com> |
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> |
#
6f2ed0e9 |
|
27-Apr-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
651fcf60 |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Add support of SPL non-relocation Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
49efe85b |
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08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: Avoid hardcoding in SPL linker script SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
6609916e |
|
09-Jan-2014 |
Po Liu <po.liu@freescale.com> |
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
81b867aa |
|
04-Sep-2013 |
Ying Zhang <b40530@freescale.com> |
SPL: P1022DS: switch to new multibus/multiadapter support - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com> |
#
bb0dc108 |
|
16-Aug-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc: mpc85xx: Support booting from SD Card with SPL The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
67ad0d52 |
|
07-Jun-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
5df572f0 |
|
20-May-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: support application without resetvec segment in the linker script For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3a88179d |
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16-Apr-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: new SPL support for IFC NAND Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3929fb0a |
|
14-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Replace __bss_end__ with __bss_end Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c97cd1ba |
|
20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
spl/85xx: new SPL support Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com> |
#
5a428e75 |
|
05-Aug-2022 |
Pali Rohár <pali@kernel.org> |
mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then expects that U-Boot proper is placed immediately after SPL without any additional padding. This allows to generate smaller SPL+U-Boot final binary as it is not required to specify fixed offset to U-Boot proper at SPL compile time. In this case offset to U-Boot proper is calculated at SPL compile time in linker script. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Marek Behún <kabel@kernel.org> |
#
7696b80e |
|
05-Aug-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Fix loading U-Boot proper from SD card in SPL Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy trims trailing zero bytes when converting ELF file to RAW binary. This is same fix for SPL linker script as was done fix for U-Boot linker script in commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support"). It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> |
#
786d9f1a |
|
11-May-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector QorIQ U-Boot binary for SD card booting compiled during build process (either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot BootROM requires that image on SD card must contain special boot sector. Implement support for generating this special boot sector directly in U-Boot start code. Boot sector needs to be at the beginning of the image, so when compiling only proper U-Boot without SPL then it needs to be in proper U-Boot. When compiling SPL with proper U-Boot then it needs to be only in SPL. Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR. Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot image could be stored on the SD card. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
de47ff53 |
|
10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig This converts the following to Kconfig: CONFIG_SYS_MPC85XX_NO_RESETVEC Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c0f47562 |
|
16-Jun-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are manually increased by 0x1000 due to .bootpg section. This section has size of 0x1000 bytes and is manually put by linker script before .text section (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Due to this fact lot of other config options are manually increased by 0x1000 value to make correct layout. Note that entry point is not on CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Put .bootpg code directly into .text section and move text base address to the start of .bootpg code. And finally remove +0x1000 value from lot of config options. With this removal custom PHDRS is not used anymore, so remove it too. After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at address -0x1000 anymore. Tested on P2020 board with SPL and proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
99e2fbcb |
|
30-May-2022 |
Andrew Scull <ascull@google.com> |
linker_lists: Rename sections to remove . prefix Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1245c6e2 |
|
05-Apr-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Define linker sections in ascending order It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2f41ade7 |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
#
a6d6812a |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4d3294b1 |
|
03-Sep-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
522b021a |
|
24-Oct-2015 |
Zhenhua Luo <zhenhua.luo@freescale.com> |
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> |
#
6f2ed0e9 |
|
27-Apr-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
651fcf60 |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Add support of SPL non-relocation Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
49efe85b |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: Avoid hardcoding in SPL linker script SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
6609916e |
|
09-Jan-2014 |
Po Liu <po.liu@freescale.com> |
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
81b867aa |
|
04-Sep-2013 |
Ying Zhang <b40530@freescale.com> |
SPL: P1022DS: switch to new multibus/multiadapter support - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com> |
#
bb0dc108 |
|
16-Aug-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc: mpc85xx: Support booting from SD Card with SPL The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
67ad0d52 |
|
07-Jun-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
5df572f0 |
|
20-May-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: support application without resetvec segment in the linker script For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3a88179d |
|
16-Apr-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: new SPL support for IFC NAND Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3929fb0a |
|
14-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Replace __bss_end__ with __bss_end Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c97cd1ba |
|
20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
spl/85xx: new SPL support Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com> |
#
786d9f1a |
|
11-May-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector QorIQ U-Boot binary for SD card booting compiled during build process (either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot BootROM requires that image on SD card must contain special boot sector. Implement support for generating this special boot sector directly in U-Boot start code. Boot sector needs to be at the beginning of the image, so when compiling only proper U-Boot without SPL then it needs to be in proper U-Boot. When compiling SPL with proper U-Boot then it needs to be only in SPL. Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR. Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot image could be stored on the SD card. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
de47ff53 |
|
10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig This converts the following to Kconfig: CONFIG_SYS_MPC85XX_NO_RESETVEC Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c0f47562 |
|
16-Jun-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are manually increased by 0x1000 due to .bootpg section. This section has size of 0x1000 bytes and is manually put by linker script before .text section (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Due to this fact lot of other config options are manually increased by 0x1000 value to make correct layout. Note that entry point is not on CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Put .bootpg code directly into .text section and move text base address to the start of .bootpg code. And finally remove +0x1000 value from lot of config options. With this removal custom PHDRS is not used anymore, so remove it too. After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at address -0x1000 anymore. Tested on P2020 board with SPL and proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
99e2fbcb |
|
30-May-2022 |
Andrew Scull <ascull@google.com> |
linker_lists: Rename sections to remove . prefix Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1245c6e2 |
|
05-Apr-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Define linker sections in ascending order It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2f41ade7 |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
#
a6d6812a |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4d3294b1 |
|
03-Sep-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
522b021a |
|
24-Oct-2015 |
Zhenhua Luo <zhenhua.luo@freescale.com> |
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> |
#
6f2ed0e9 |
|
27-Apr-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
651fcf60 |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Add support of SPL non-relocation Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
49efe85b |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: Avoid hardcoding in SPL linker script SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
6609916e |
|
09-Jan-2014 |
Po Liu <po.liu@freescale.com> |
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
81b867aa |
|
04-Sep-2013 |
Ying Zhang <b40530@freescale.com> |
SPL: P1022DS: switch to new multibus/multiadapter support - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com> |
#
bb0dc108 |
|
16-Aug-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc: mpc85xx: Support booting from SD Card with SPL The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
67ad0d52 |
|
07-Jun-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
5df572f0 |
|
20-May-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: support application without resetvec segment in the linker script For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3a88179d |
|
16-Apr-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: new SPL support for IFC NAND Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3929fb0a |
|
14-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Replace __bss_end__ with __bss_end Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c97cd1ba |
|
20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
spl/85xx: new SPL support Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com> |
#
de47ff53 |
|
10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig This converts the following to Kconfig: CONFIG_SYS_MPC85XX_NO_RESETVEC Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c0f47562 |
|
16-Jun-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are manually increased by 0x1000 due to .bootpg section. This section has size of 0x1000 bytes and is manually put by linker script before .text section (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Due to this fact lot of other config options are manually increased by 0x1000 value to make correct layout. Note that entry point is not on CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is set. Put .bootpg code directly into .text section and move text base address to the start of .bootpg code. And finally remove +0x1000 value from lot of config options. With this removal custom PHDRS is not used anymore, so remove it too. After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at address -0x1000 anymore. Tested on P2020 board with SPL and proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
99e2fbcb |
|
30-May-2022 |
Andrew Scull <ascull@google.com> |
linker_lists: Rename sections to remove . prefix Rename the sections used to implement linker lists so they begin with '__u_boot_list' rather than '.u_boot_list'. The double underscore at the start is still distinct from the single underscore used by the symbol names. Having a '.' in the section names conflicts with clang's ASAN instrumentation which tries to add redzones between the linker list elements, causing expected accesses to fail. However, clang doesn't try to add redzones to user sections, which are names with all alphanumeric and underscore characters. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1245c6e2 |
|
05-Apr-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Define linker sections in ascending order It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2f41ade7 |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
#
a6d6812a |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4d3294b1 |
|
03-Sep-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
522b021a |
|
24-Oct-2015 |
Zhenhua Luo <zhenhua.luo@freescale.com> |
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> |
#
6f2ed0e9 |
|
27-Apr-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
651fcf60 |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Add support of SPL non-relocation Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
49efe85b |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: Avoid hardcoding in SPL linker script SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
6609916e |
|
09-Jan-2014 |
Po Liu <po.liu@freescale.com> |
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
81b867aa |
|
04-Sep-2013 |
Ying Zhang <b40530@freescale.com> |
SPL: P1022DS: switch to new multibus/multiadapter support - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com> |
#
bb0dc108 |
|
16-Aug-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc: mpc85xx: Support booting from SD Card with SPL The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
67ad0d52 |
|
07-Jun-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
5df572f0 |
|
20-May-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: support application without resetvec segment in the linker script For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3a88179d |
|
16-Apr-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: new SPL support for IFC NAND Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3929fb0a |
|
14-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Replace __bss_end__ with __bss_end Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c97cd1ba |
|
20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
spl/85xx: new SPL support Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com> |
#
1245c6e2 |
|
05-Apr-2022 |
Pali Rohár <pali@kernel.org> |
powerpc: mpc85xx: Define linker sections in ascending order It is too confusing if sections are defined in non-ascending order. Also linker has to go backward and then again forward when generating final binary. To make future changes easier, define all linker sections in ascending order. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> |
#
2f41ade7 |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
#
a6d6812a |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4d3294b1 |
|
03-Sep-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
522b021a |
|
24-Oct-2015 |
Zhenhua Luo <zhenhua.luo@freescale.com> |
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> |
#
6f2ed0e9 |
|
27-Apr-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
651fcf60 |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Add support of SPL non-relocation Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
49efe85b |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: Avoid hardcoding in SPL linker script SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
6609916e |
|
09-Jan-2014 |
Po Liu <po.liu@freescale.com> |
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
81b867aa |
|
04-Sep-2013 |
Ying Zhang <b40530@freescale.com> |
SPL: P1022DS: switch to new multibus/multiadapter support - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com> |
#
bb0dc108 |
|
16-Aug-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc: mpc85xx: Support booting from SD Card with SPL The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
67ad0d52 |
|
07-Jun-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
5df572f0 |
|
20-May-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: support application without resetvec segment in the linker script For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3a88179d |
|
16-Apr-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: new SPL support for IFC NAND Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
3929fb0a |
|
14-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Replace __bss_end__ with __bss_end Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c97cd1ba |
|
20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
spl/85xx: new SPL support Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com> |
#
2f41ade7 |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
linker: Modify linker scripts to be more generic Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the same script for both SPL and TPL. Add logic to scripts/Makefile.spl to pass in the right value when preprocessing the script. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
#
a6d6812a |
|
22-Jan-2019 |
Tom Rini <trini@konsulko.com> |
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4d3294b1 |
|
03-Sep-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
522b021a |
|
24-Oct-2015 |
Zhenhua Luo <zhenhua.luo@freescale.com> |
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> |
#
6f2ed0e9 |
|
27-Apr-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
651fcf60 |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Add support of SPL non-relocation Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
49efe85b |
|
08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: Avoid hardcoding in SPL linker script SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
6609916e |
|
09-Jan-2014 |
Po Liu <po.liu@freescale.com> |
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
#
81b867aa |
|
04-Sep-2013 |
Ying Zhang <b40530@freescale.com> |
SPL: P1022DS: switch to new multibus/multiadapter support - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com> |
#
bb0dc108 |
|
16-Aug-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc: mpc85xx: Support booting from SD Card with SPL The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
67ad0d52 |
|
07-Jun-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
5df572f0 |
|
20-May-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: support application without resetvec segment in the linker script For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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3a88179d |
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16-Apr-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: new SPL support for IFC NAND Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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3929fb0a |
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14-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Replace __bss_end__ with __bss_end Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c97cd1ba |
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20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
spl/85xx: new SPL support Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com> |
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4d3294b1 |
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03-Sep-2018 |
Jagdish Gediya <jagdish.gediya@nxp.com> |
powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files 'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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522b021a |
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24-Oct-2015 |
Zhenhua Luo <zhenhua.luo@freescale.com> |
mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definition In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
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6f2ed0e9 |
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27-Apr-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
cosmetic: delete misleading comment /* CONFIG_BOARDDIR */ CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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651fcf60 |
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08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc:Add support of SPL non-relocation Current SPL code base has BSS section placed after reset_vector. This means they have to relocate to use the global variables. This put an implicit requirement of having SPL size = Memory/2. To avoid relocation: - Move bss_section within SPL range - Modify relocate_code() Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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49efe85b |
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08-Apr-2014 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: Avoid hardcoding in SPL linker script SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations. Avoid such hardcoding. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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6609916e |
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09-Jan-2014 |
Po Liu <po.liu@freescale.com> |
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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81b867aa |
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04-Sep-2013 |
Ying Zhang <b40530@freescale.com> |
SPL: P1022DS: switch to new multibus/multiadapter support - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com>
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bb0dc108 |
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16-Aug-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc: mpc85xx: Support booting from SD Card with SPL The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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67ad0d52 |
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07-Jun-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop. 1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes. This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script". Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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#
5df572f0 |
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20-May-2013 |
Ying Zhang <b40530@freescale.com> |
powerpc/mpc85xx: support application without resetvec segment in the linker script For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless. So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text. Signed-off-by: Ying Zhang <b40530@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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#
3a88179d |
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16-Apr-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/mpc85xx: new SPL support for IFC NAND Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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#
3929fb0a |
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14-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Replace __bss_end__ with __bss_end Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
c97cd1ba |
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20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
spl/85xx: new SPL support Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
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