Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""

When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>

global: Make <asm/global_data.h> include <asm/u-boot.h>

This follows the example of RISC-V where <asm/global_data.h> includes
<asm/u-boot.h> directly as "gd" includes a reference to bd_info already
and so the first must include the second anyhow. We then remove
<asm/u-boot.h> from all of the places which include references to "gd"
an so have <asm/global_data.h> already.

Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: uniphier: Move uniphier_mem_map_init() call into dram_init()

The function uniphier_mem_map_init() is to change global variable
'mem_map', which is referenced to get_page_table_size() to calculate
the size of page table.

However, uniphier_mem_map_init() is called after get_page_table_size(),
so the size of page table and 'mem_map' become inconsist each other.
After all, U-Boot fails to boot on chip with memory map different from
default map,

uniphier_mem_map_init() should be moved to dram_init(), which is
called before get_page_table_size().

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: split ft_board_setup() out to a separate file

Prepare to add more fdt fixup code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: clean-up ft_board_setup()

The 'bd' is passed in ft_board_setup() as the second argument.
Replace 'gd->bd' with 'bd'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: uniphier: hide memory top by platform hook instead of CONFIG

I do not see a good reason to do this by a CONFIG option that affects
all SoCs. The ram_size can be adjusted by dram_init() at run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: do not use RAM that exceeds 32 bit address range

LD20 / PXs3 boards are equipped with a large amount of memory beyond
the 32 bit address range. U-Boot relocates itself to the end of the
available RAM.

This is a problem for DMA engines that only support 32 bit physical
address, like the SDMA of SDHCI controllers.

In fact, U-Boot does not need to run at the very end of RAM. It is
rather troublesome for drivers with DMA engines because U-Boot does
not have API like dma_set_mask(), so DMA silently fails, making the
driver debugging difficult.

Hide the memory region that exceeds the 32 bit address range. It can
be done by simply carving out gd->ram_size. It would also possible to
override get_effective_memsize() or to define CONFIG_MAX_MEM_MAPPED,
but dram_init() is a good enough place to do this job.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: use pr_() instead of printf() where appropriate

Replace printf() with pr_() to specify proper loglevel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

printk: collect printk stuff into <linux/printk.h> with loglevel support

When we import code from Linux, with regular re-sync planned, we want
to use printk() and pr_*(). U-Boot does not support them in a clean
way. So, people end up with local macros, or compat headers here and
there, then we occasionally see build errors of definition conflicts.

We have include/linux/compat.h, but putting all sorts of unrelated
things into a single header is just a temporal workaround. Hence this
patch, to find the best home for all printk variants. If you want to
use printk() and friends, please include <linux/printk.h>. This header
is self-contained, and pulls in only a few headers.

When I was testing this clean-up, I noticed the image size exceeded
its platform limit on some boards. This is because all pr_*() that
were previously defined as no-op in include/linux/mtd/mtd.h (unless
CONFIG_MTD_DEBUG is set), are now enabled.

To make such boards happy, this commit also implements CONFIG_LOGLEVEL.
The concept is similar to the kernel parameter "loglevel". (Actually,
the Kconfig help message was taken from kernel-paremeter.txt of Linux)
Messages with a loglevel smaller than console loglevel will be printed.

The difference is the loglevel is build-time determined. To save the
image size, lower priority pr_*() are compiled out. I set the default
of CONFIG_LOGLEVEL to 6, i.e. pr_notice and higher priority messages
are compiled in.

I adjusted CONFIG_LOGLEVEL to avoid build error for some boards.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add in SPL_LOGLEVEL that is the same as LOGLEVEL]
Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: uniphier: remove sLD3 SoC support

This SoC is too old. It is difficult to maintain any longer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: fix various sparse warnings

Fix warnings reported by sparse:
- ... was not declared. Should it be static?"
- cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

board_f: Drop setup_dram_config() wrapper

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

ARM: uniphier: remove DRAM base address from board parameters

The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding. What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: skip memreserve of unused DRAM bank of LD20

Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.

Fixes: c995f3a3c526 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: correct spelling of "invalid"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is set

If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC

For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT to
prevent the kernel from using them. Now gd->bd->bi_dram reflects
the actual memory banks. Just use it instead of getting access to
the board parameters.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: detect RAM size by decoding HW register instead of DT

U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect the
memory banks. Currently, UniPhier adopts the memory banks _alleged_
by DT. This is based on the assumption that users bind a correct DT
in their build process.

Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM). So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff. The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware. However, if the DRAM controller
is wrongly configured, the system will crash. If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.

Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: simplify SoC ID get function

Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification. Come to think of it, there is no need for the
conversion in the first place. Using the SoC ID from the register
as-is a straightforward way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: replace <linux/err.h> with <linux/errno.h>

These files only need error number macros. Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20

The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically. This compensates for the voltage and temperature
deviation and improves the PHY parameter adjustment. Instead, it
requires 64 byte scratch memory in each DRAM channel for the dynamic
training. The memory regions must be reserved in DT before jumping
to the kernel.

The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions on run-time by U-Boot
instead of statically embedding it in the DT in Linux. Anyway,
a boot-loader should know much more about memory initialization
than the kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: avoid unaligned access to DT on 64bit SoC

Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64

Currently, these functions assume #address-cells and #size-cells are
both one. Fix them to support 64bit DTB.

Also, I am fixing a buffer overrun bug while I am here. The array
size of gd->bd->bd_dram is CONFIG_NR_DRAM_BANKS. The number of
iteration in the loop should be limited by that CONFIG.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: fix warnings reported by aarch64 compiler

The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler. Before
adding the ARMv8 support really, fix them now.

Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: parse device tree to determine DRAM base and size

Device tree specifies the available memory ranges in its "/memory"
node. Use it to simplify the CONFIG defines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: UniPhier: move SoC sources to mach-uniphier

Move
arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

global: Make <asm/global_data.h> include <asm/u-boot.h>

This follows the example of RISC-V where <asm/global_data.h> includes
<asm/u-boot.h> directly as "gd" includes a reference to bd_info already
and so the first must include the second anyhow. We then remove
<asm/u-boot.h> from all of the places which include references to "gd"
an so have <asm/global_data.h> already.

Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: uniphier: Move uniphier_mem_map_init() call into dram_init()

The function uniphier_mem_map_init() is to change global variable
'mem_map', which is referenced to get_page_table_size() to calculate
the size of page table.

However, uniphier_mem_map_init() is called after get_page_table_size(),
so the size of page table and 'mem_map' become inconsist each other.
After all, U-Boot fails to boot on chip with memory map different from
default map,

uniphier_mem_map_init() should be moved to dram_init(), which is
called before get_page_table_size().

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: split ft_board_setup() out to a separate file

Prepare to add more fdt fixup code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: clean-up ft_board_setup()

The 'bd' is passed in ft_board_setup() as the second argument.
Replace 'gd->bd' with 'bd'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: uniphier: hide memory top by platform hook instead of CONFIG

I do not see a good reason to do this by a CONFIG option that affects
all SoCs. The ram_size can be adjusted by dram_init() at run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: do not use RAM that exceeds 32 bit address range

LD20 / PXs3 boards are equipped with a large amount of memory beyond
the 32 bit address range. U-Boot relocates itself to the end of the
available RAM.

This is a problem for DMA engines that only support 32 bit physical
address, like the SDMA of SDHCI controllers.

In fact, U-Boot does not need to run at the very end of RAM. It is
rather troublesome for drivers with DMA engines because U-Boot does
not have API like dma_set_mask(), so DMA silently fails, making the
driver debugging difficult.

Hide the memory region that exceeds the 32 bit address range. It can
be done by simply carving out gd->ram_size. It would also possible to
override get_effective_memsize() or to define CONFIG_MAX_MEM_MAPPED,
but dram_init() is a good enough place to do this job.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: use pr_() instead of printf() where appropriate

Replace printf() with pr_() to specify proper loglevel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

printk: collect printk stuff into <linux/printk.h> with loglevel support

When we import code from Linux, with regular re-sync planned, we want
to use printk() and pr_*(). U-Boot does not support them in a clean
way. So, people end up with local macros, or compat headers here and
there, then we occasionally see build errors of definition conflicts.

We have include/linux/compat.h, but putting all sorts of unrelated
things into a single header is just a temporal workaround. Hence this
patch, to find the best home for all printk variants. If you want to
use printk() and friends, please include <linux/printk.h>. This header
is self-contained, and pulls in only a few headers.

When I was testing this clean-up, I noticed the image size exceeded
its platform limit on some boards. This is because all pr_*() that
were previously defined as no-op in include/linux/mtd/mtd.h (unless
CONFIG_MTD_DEBUG is set), are now enabled.

To make such boards happy, this commit also implements CONFIG_LOGLEVEL.
The concept is similar to the kernel parameter "loglevel". (Actually,
the Kconfig help message was taken from kernel-paremeter.txt of Linux)
Messages with a loglevel smaller than console loglevel will be printed.

The difference is the loglevel is build-time determined. To save the
image size, lower priority pr_*() are compiled out. I set the default
of CONFIG_LOGLEVEL to 6, i.e. pr_notice and higher priority messages
are compiled in.

I adjusted CONFIG_LOGLEVEL to avoid build error for some boards.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add in SPL_LOGLEVEL that is the same as LOGLEVEL]
Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: uniphier: remove sLD3 SoC support

This SoC is too old. It is difficult to maintain any longer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: fix various sparse warnings

Fix warnings reported by sparse:
- ... was not declared. Should it be static?"
- cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

board_f: Drop setup_dram_config() wrapper

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

ARM: uniphier: remove DRAM base address from board parameters

The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding. What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: skip memreserve of unused DRAM bank of LD20

Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.

Fixes: c995f3a3c526 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: correct spelling of "invalid"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is set

If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC

For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT to
prevent the kernel from using them. Now gd->bd->bi_dram reflects
the actual memory banks. Just use it instead of getting access to
the board parameters.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: detect RAM size by decoding HW register instead of DT

U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect the
memory banks. Currently, UniPhier adopts the memory banks _alleged_
by DT. This is based on the assumption that users bind a correct DT
in their build process.

Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM). So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff. The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware. However, if the DRAM controller
is wrongly configured, the system will crash. If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.

Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: simplify SoC ID get function

Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification. Come to think of it, there is no need for the
conversion in the first place. Using the SoC ID from the register
as-is a straightforward way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: replace <linux/err.h> with <linux/errno.h>

These files only need error number macros. Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20

The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically. This compensates for the voltage and temperature
deviation and improves the PHY parameter adjustment. Instead, it
requires 64 byte scratch memory in each DRAM channel for the dynamic
training. The memory regions must be reserved in DT before jumping
to the kernel.

The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions on run-time by U-Boot
instead of statically embedding it in the DT in Linux. Anyway,
a boot-loader should know much more about memory initialization
than the kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: avoid unaligned access to DT on 64bit SoC

Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64

Currently, these functions assume #address-cells and #size-cells are
both one. Fix them to support 64bit DTB.

Also, I am fixing a buffer overrun bug while I am here. The array
size of gd->bd->bd_dram is CONFIG_NR_DRAM_BANKS. The number of
iteration in the loop should be limited by that CONFIG.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: fix warnings reported by aarch64 compiler

The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler. Before
adding the ARMv8 support really, fix them now.

Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: parse device tree to determine DRAM base and size

Device tree specifies the available memory ranges in its "/memory"
node. Use it to simplify the CONFIG defines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: UniPhier: move SoC sources to mach-uniphier

Move
arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

ARM: uniphier: Move uniphier_mem_map_init() call into dram_init()

The function uniphier_mem_map_init() is to change global variable
'mem_map', which is referenced to get_page_table_size() to calculate
the size of page table.

However, uniphier_mem_map_init() is called after get_page_table_size(),
so the size of page table and 'mem_map' become inconsist each other.
After all, U-Boot fails to boot on chip with memory map different from
default map,

uniphier_mem_map_init() should be moved to dram_init(), which is
called before get_page_table_size().

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: split ft_board_setup() out to a separate file

Prepare to add more fdt fixup code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: clean-up ft_board_setup()

The 'bd' is passed in ft_board_setup() as the second argument.
Replace 'gd->bd' with 'bd'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: uniphier: hide memory top by platform hook instead of CONFIG

I do not see a good reason to do this by a CONFIG option that affects
all SoCs. The ram_size can be adjusted by dram_init() at run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: do not use RAM that exceeds 32 bit address range

LD20 / PXs3 boards are equipped with a large amount of memory beyond
the 32 bit address range. U-Boot relocates itself to the end of the
available RAM.

This is a problem for DMA engines that only support 32 bit physical
address, like the SDMA of SDHCI controllers.

In fact, U-Boot does not need to run at the very end of RAM. It is
rather troublesome for drivers with DMA engines because U-Boot does
not have API like dma_set_mask(), so DMA silently fails, making the
driver debugging difficult.

Hide the memory region that exceeds the 32 bit address range. It can
be done by simply carving out gd->ram_size. It would also possible to
override get_effective_memsize() or to define CONFIG_MAX_MEM_MAPPED,
but dram_init() is a good enough place to do this job.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: use pr_() instead of printf() where appropriate

Replace printf() with pr_() to specify proper loglevel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

printk: collect printk stuff into <linux/printk.h> with loglevel support

When we import code from Linux, with regular re-sync planned, we want
to use printk() and pr_*(). U-Boot does not support them in a clean
way. So, people end up with local macros, or compat headers here and
there, then we occasionally see build errors of definition conflicts.

We have include/linux/compat.h, but putting all sorts of unrelated
things into a single header is just a temporal workaround. Hence this
patch, to find the best home for all printk variants. If you want to
use printk() and friends, please include <linux/printk.h>. This header
is self-contained, and pulls in only a few headers.

When I was testing this clean-up, I noticed the image size exceeded
its platform limit on some boards. This is because all pr_*() that
were previously defined as no-op in include/linux/mtd/mtd.h (unless
CONFIG_MTD_DEBUG is set), are now enabled.

To make such boards happy, this commit also implements CONFIG_LOGLEVEL.
The concept is similar to the kernel parameter "loglevel". (Actually,
the Kconfig help message was taken from kernel-paremeter.txt of Linux)
Messages with a loglevel smaller than console loglevel will be printed.

The difference is the loglevel is build-time determined. To save the
image size, lower priority pr_*() are compiled out. I set the default
of CONFIG_LOGLEVEL to 6, i.e. pr_notice and higher priority messages
are compiled in.

I adjusted CONFIG_LOGLEVEL to avoid build error for some boards.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add in SPL_LOGLEVEL that is the same as LOGLEVEL]
Signed-off-by: Tom Rini <trini@konsulko.com>

ARM: uniphier: remove sLD3 SoC support

This SoC is too old. It is difficult to maintain any longer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: fix various sparse warnings

Fix warnings reported by sparse:
- ... was not declared. Should it be static?"
- cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

board_f: Drop setup_dram_config() wrapper

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

ARM: uniphier: remove DRAM base address from board parameters

The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding. What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: skip memreserve of unused DRAM bank of LD20

Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.

Fixes: c995f3a3c526 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: correct spelling of "invalid"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is set

If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC

For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT to
prevent the kernel from using them. Now gd->bd->bi_dram reflects
the actual memory banks. Just use it instead of getting access to
the board parameters.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: detect RAM size by decoding HW register instead of DT

U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect the
memory banks. Currently, UniPhier adopts the memory banks _alleged_
by DT. This is based on the assumption that users bind a correct DT
in their build process.

Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM). So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff. The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware. However, if the DRAM controller
is wrongly configured, the system will crash. If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.

Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: simplify SoC ID get function

Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification. Come to think of it, there is no need for the
conversion in the first place. Using the SoC ID from the register
as-is a straightforward way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: replace <linux/err.h> with <linux/errno.h>

These files only need error number macros. Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20

The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically. This compensates for the voltage and temperature
deviation and improves the PHY parameter adjustment. Instead, it
requires 64 byte scratch memory in each DRAM channel for the dynamic
training. The memory regions must be reserved in DT before jumping
to the kernel.

The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions on run-time by U-Boot
instead of statically embedding it in the DT in Linux. Anyway,
a boot-loader should know much more about memory initialization
than the kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: avoid unaligned access to DT on 64bit SoC

Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64

Currently, these functions assume #address-cells and #size-cells are
both one. Fix them to support 64bit DTB.

Also, I am fixing a buffer overrun bug while I am here. The array
size of gd->bd->bd_dram is CONFIG_NR_DRAM_BANKS. The number of
iteration in the loop should be limited by that CONFIG.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: fix warnings reported by aarch64 compiler

The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler. Before
adding the ARMv8 support really, fix them now.

Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: parse device tree to determine DRAM base and size

Device tree specifies the available memory ranges in its "/memory"
node. Use it to simplify the CONFIG defines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: UniPhier: move SoC sources to mach-uniphier

Move
arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/*

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: de-couple SG macros into base address and offset

The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.

Turn the SG_* macros into the offset from the base address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: include <linux/io.h> from dram_init.c

This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: delete or replace <common.h> includes

<common.h> pulls in a lot of bloat. <common.h> is unneeded in most of
places.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

common: Drop init.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

ARM: uniphier: set gd->ram_base correctly

gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE

The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make mem_map run-time configurable

Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() more generic

Make this function work with any channel being empty.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: make dram_init() independent of SG_MEMCONF

Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.

This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.

Refactor the hook in a more generic way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>