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6da8400d |
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04-Aug-2023 |
Jonas Karlman <jonas@kwiboo.se> |
clk: rockchip: rk3568: Fix mask for clk_cpll_div_25m_div The field for clk_cpll_div_25m_div in CRU_CLKSEL_CON81 is 6 bits wide, not 5 bits wide as currently defined in CPLL_25M_DIV_MASK. Fix this and the assert so that CPLL_25M can be assigned a 25 MHz rate. Fixes: 4a262feba3a5 ("rockchip: rk3568: add clock driver") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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6e710897 |
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07-Aug-2023 |
Anton <vao@asu-vei.ru> |
rockchip: cru: Enable cpu info support for rk3568 Add cru structure definition in head file to support cpu_info driver. Series-version: 2 Series-changes: 2 Format the patch header, add commit message and signature. Signed-off-by: Anton <vao@asu-vei.ru> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
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f2cdd44a |
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12-Oct-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3568: update clks fix up ppll init freq. support tclk_emmc. add freq (26M) for mmc device. fix up the sfc clk rate unit error. Change in V2: remove change id. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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4a262feb |
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01-Jun-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: rk3568: add clock driver Add rk3568 clock driver and cru structure definition. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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f2cdd44a |
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12-Oct-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3568: update clks fix up ppll init freq. support tclk_emmc. add freq (26M) for mmc device. fix up the sfc clk rate unit error. Change in V2: remove change id. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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4a262feb |
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01-Jun-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: rk3568: add clock driver Add rk3568 clock driver and cru structure definition. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
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4a262feb |
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01-Jun-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: rk3568: add clock driver Add rk3568 clock driver and cru structure definition. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |