#
65cc0e2a |
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16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c329f934 |
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24-Apr-2022 |
Marek Vasut <marex@denx.de> |
ARM: imx: imx31: Introduce and use UART_BASE_ADDR(n) Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
93a0ea50 |
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12-Aug-2014 |
Andrew Ruder <andrew.ruder@elecsyscorp.com> |
arm: mx31: use common timer functions This patch moves mx31 to the common timer functions added in commit 8dfafdd - Introduce common timer functions <Rob Herring> The (removed) mx31 timer code (specifically __udelay()) could deadlock at the 32-bit boundary of get_ticks(). get_ticks() returned a 32-bit value cast up to a 64-bit value. If get_ticks() + tmo in __udelay() crossed the 32-bit boundary, the while condition became unconditionally true and locks the processor. Rather than patch the specific mx31 issues, simply move everything over to the common code. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Marek Vasut <marex@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Helmut Raiger <helmut.raiger@hale.at> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
0f67e09e |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add fsl_iim driver Add a fsl_iim driver common to i.MX and MPC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
#
6adbd302 |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
imx: Add useful fuse definitions Define the UID (SoC unique ID) fuses, and the fuses available for the user. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
#
8f3ff11c |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
imx: Homogenize and fix fuse register definitions IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
abbab703 |
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22-Oct-2012 |
Troy Kisky <troy.kisky@boundarydevices.com> |
mx31/mx35/mx51/mx53/mx6: add watchdog Use a common watchdog driver for all these cpus. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
34d33b67 |
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13-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
ehci-mxc: Define host offsets Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
#
8eeb19be |
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13-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Move EHCI definitions to ehci-fsl.h The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
#
9e0081d5 |
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14-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Fix PDR0_CSI_PODF The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0 register is actually composed of two bit-fields: one pre-divider and one post-divider. This patch fixes the CCM access macros and the code using them accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> |
#
df7e420b |
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14-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Add more CCM access macros Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8e99ecd7 |
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13-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc: Define architecture identifier Define ARCH_MXC for i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs. The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Kim Phillips <kim.phillips@freescale.com> |
#
f2d3ae07 |
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13-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx3: Fix typo on IPU_CONF_CSI_EN Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de6f604d |
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24-Apr-2012 |
Troy Kisky <troy.kisky@boundarydevices.com> |
mxc_i2c: specify i2c base address in config file The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
fa47a286 |
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10-Jan-2012 |
Helmut Raiger <helmut.raiger@hale.at> |
mmc: access mxcmmc from mx31 boards This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
#
40f6fffe |
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22-Nov-2011 |
Stefano Babic <sbabic@denx.de> |
MX: serial_mxc: cleanup removing nasty #ifdef The serial driver for iMX SOCs is continuosly changed if a new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port> defines were used only to find the base address for the selected UART. Instead of that, move the base address to the board configuration file and drop all #ifdef from driver. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Helmut Raiger <helmut.raiger@hale.at> CC: John Rigby <jcrigby@gmail.com> CC: Matthias Weisser <weisserm@arcor.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org> |
#
ce93dc9b |
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08-Nov-2011 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx31: Use proper IO accessor for GPR register Use proper IO accessor for GPR register. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
a6d9de43 |
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26-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: add ESD control registers This allows to initialize DDR memory in C code. Currently all mx31 boards use assembler code (lowlevel_init.S) Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
#
d121d201 |
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26-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: define pins and init for UART2 and CSPI3 Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
#
6d0fb3db |
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20-Oct-2011 |
Fabio Estevam <festevam@gmail.com> |
mx31: Introduce mx31_set_gpr function Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31. This function can be useful for setting a group of pins into tied to some specific peripherals. Reuse this function from the linux kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
47c5455a |
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28-Sep-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: provide readable WEIM CS accessor setup_weimcs() and some macros are added to support the setup for i.MX31 WEIM chip selects. As a compromise between verbosity and readability an ASCII-art'ish bit comment is used instead of bitfields. All i.MX31 boards have been patched to use this approach using a helper program to verify the changes. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
#
f0029198 |
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12-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: make HSP clock for mx3fb driver available This additionally updates mx31/generic.c by - replacing __REG() macro accesses with readl() and writel() - providing macros for PDR0 and PLL bit accesses Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> |
#
610b53e2 |
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20-Sep-2011 |
Fabio Estevam <fabio.estevam@freescale.com> |
MX31: Disable watchdog during low-power modes Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes. Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt and there was no activity, the system entered into idle mode while watchdog timer was still active. Fix this by disabling watchdog timer during idle mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
6cb2e774 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: make use of GPIO framework for MX31 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dddb7c9f |
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05-Jul-2011 |
Matthias Weisser <weisserm@arcor.de> |
imx: Add support for USB EHCI on imx25 Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de> |
#
2f22045b |
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29-Apr-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: change return value of get_cpu_rev Drop warnings in get_cpu_rev and changes the return value (a u32 instead of char * is returned) of the function to be coherent with other processors. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Detlev Zundel <dzu@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
cd4b8a63 |
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21-Apr-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: drop warnings in get_cpu_rev Drop warnings due to recent commit ARM: mx31: Print the silicon version Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
a770975a |
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15-Apr-2011 |
Fabio Estevam <festevam@gmail.com> |
ARM: MX31: Fix file name label Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers) renamed mx31-imx-regs.h to imx-regs.h. Change the file label accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
4adaf9bf |
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11-Apr-2011 |
Fabio Estevam <festevam@gmail.com> |
ARM: mx31: Print the silicon version Use the same method of the Linux kernel to print the MX31 silicon version on boot. Tested on a MX31PDK with a 2.0 silicon, where it shows: CPU: Freescale i.MX31 rev 2.0 at 531 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
c329f934 |
|
24-Apr-2022 |
Marek Vasut <marex@denx.de> |
ARM: imx: imx31: Introduce and use UART_BASE_ADDR(n) Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
93a0ea50 |
|
12-Aug-2014 |
Andrew Ruder <andrew.ruder@elecsyscorp.com> |
arm: mx31: use common timer functions This patch moves mx31 to the common timer functions added in commit 8dfafdd - Introduce common timer functions <Rob Herring> The (removed) mx31 timer code (specifically __udelay()) could deadlock at the 32-bit boundary of get_ticks(). get_ticks() returned a 32-bit value cast up to a 64-bit value. If get_ticks() + tmo in __udelay() crossed the 32-bit boundary, the while condition became unconditionally true and locks the processor. Rather than patch the specific mx31 issues, simply move everything over to the common code. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Marek Vasut <marex@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Helmut Raiger <helmut.raiger@hale.at> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
0f67e09e |
|
23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add fsl_iim driver Add a fsl_iim driver common to i.MX and MPC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
#
6adbd302 |
|
23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
imx: Add useful fuse definitions Define the UID (SoC unique ID) fuses, and the fuses available for the user. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
#
8f3ff11c |
|
23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
imx: Homogenize and fix fuse register definitions IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
abbab703 |
|
22-Oct-2012 |
Troy Kisky <troy.kisky@boundarydevices.com> |
mx31/mx35/mx51/mx53/mx6: add watchdog Use a common watchdog driver for all these cpus. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
34d33b67 |
|
13-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
ehci-mxc: Define host offsets Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
#
8eeb19be |
|
13-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Move EHCI definitions to ehci-fsl.h The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
#
9e0081d5 |
|
14-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Fix PDR0_CSI_PODF The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0 register is actually composed of two bit-fields: one pre-divider and one post-divider. This patch fixes the CCM access macros and the code using them accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> |
#
df7e420b |
|
14-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Add more CCM access macros Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8e99ecd7 |
|
13-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc: Define architecture identifier Define ARCH_MXC for i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs. The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Kim Phillips <kim.phillips@freescale.com> |
#
f2d3ae07 |
|
13-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx3: Fix typo on IPU_CONF_CSI_EN Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de6f604d |
|
24-Apr-2012 |
Troy Kisky <troy.kisky@boundarydevices.com> |
mxc_i2c: specify i2c base address in config file The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
|
31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
fa47a286 |
|
10-Jan-2012 |
Helmut Raiger <helmut.raiger@hale.at> |
mmc: access mxcmmc from mx31 boards This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
#
40f6fffe |
|
22-Nov-2011 |
Stefano Babic <sbabic@denx.de> |
MX: serial_mxc: cleanup removing nasty #ifdef The serial driver for iMX SOCs is continuosly changed if a new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port> defines were used only to find the base address for the selected UART. Instead of that, move the base address to the board configuration file and drop all #ifdef from driver. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Helmut Raiger <helmut.raiger@hale.at> CC: John Rigby <jcrigby@gmail.com> CC: Matthias Weisser <weisserm@arcor.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org> |
#
ce93dc9b |
|
08-Nov-2011 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx31: Use proper IO accessor for GPR register Use proper IO accessor for GPR register. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
a6d9de43 |
|
26-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: add ESD control registers This allows to initialize DDR memory in C code. Currently all mx31 boards use assembler code (lowlevel_init.S) Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
#
d121d201 |
|
26-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: define pins and init for UART2 and CSPI3 Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
#
6d0fb3db |
|
20-Oct-2011 |
Fabio Estevam <festevam@gmail.com> |
mx31: Introduce mx31_set_gpr function Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31. This function can be useful for setting a group of pins into tied to some specific peripherals. Reuse this function from the linux kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
47c5455a |
|
28-Sep-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: provide readable WEIM CS accessor setup_weimcs() and some macros are added to support the setup for i.MX31 WEIM chip selects. As a compromise between verbosity and readability an ASCII-art'ish bit comment is used instead of bitfields. All i.MX31 boards have been patched to use this approach using a helper program to verify the changes. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
#
f0029198 |
|
12-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: make HSP clock for mx3fb driver available This additionally updates mx31/generic.c by - replacing __REG() macro accesses with readl() and writel() - providing macros for PDR0 and PLL bit accesses Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> |
#
610b53e2 |
|
20-Sep-2011 |
Fabio Estevam <fabio.estevam@freescale.com> |
MX31: Disable watchdog during low-power modes Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes. Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt and there was no activity, the system entered into idle mode while watchdog timer was still active. Fix this by disabling watchdog timer during idle mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
6cb2e774 |
|
21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: make use of GPIO framework for MX31 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dddb7c9f |
|
05-Jul-2011 |
Matthias Weisser <weisserm@arcor.de> |
imx: Add support for USB EHCI on imx25 Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de> |
#
2f22045b |
|
29-Apr-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: change return value of get_cpu_rev Drop warnings in get_cpu_rev and changes the return value (a u32 instead of char * is returned) of the function to be coherent with other processors. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Detlev Zundel <dzu@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
cd4b8a63 |
|
21-Apr-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: drop warnings in get_cpu_rev Drop warnings due to recent commit ARM: mx31: Print the silicon version Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
a770975a |
|
15-Apr-2011 |
Fabio Estevam <festevam@gmail.com> |
ARM: MX31: Fix file name label Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers) renamed mx31-imx-regs.h to imx-regs.h. Change the file label accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
4adaf9bf |
|
11-Apr-2011 |
Fabio Estevam <festevam@gmail.com> |
ARM: mx31: Print the silicon version Use the same method of the Linux kernel to print the MX31 silicon version on boot. Tested on a MX31PDK with a 2.0 silicon, where it shows: CPU: Freescale i.MX31 rev 2.0 at 531 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
86271115 |
|
14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
|
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
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#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
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#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
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#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
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#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
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#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
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#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
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#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de>
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#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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93a0ea50 |
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12-Aug-2014 |
Andrew Ruder <andrew.ruder@elecsyscorp.com> |
arm: mx31: use common timer functions This patch moves mx31 to the common timer functions added in commit 8dfafdd - Introduce common timer functions <Rob Herring> The (removed) mx31 timer code (specifically __udelay()) could deadlock at the 32-bit boundary of get_ticks(). get_ticks() returned a 32-bit value cast up to a 64-bit value. If get_ticks() + tmo in __udelay() crossed the 32-bit boundary, the while condition became unconditionally true and locks the processor. Rather than patch the specific mx31 issues, simply move everything over to the common code. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Marek Vasut <marex@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Helmut Raiger <helmut.raiger@hale.at> |
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
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0f67e09e |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add fsl_iim driver Add a fsl_iim driver common to i.MX and MPC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
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6adbd302 |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
imx: Add useful fuse definitions Define the UID (SoC unique ID) fuses, and the fuses available for the user. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
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8f3ff11c |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
imx: Homogenize and fix fuse register definitions IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
abbab703 |
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22-Oct-2012 |
Troy Kisky <troy.kisky@boundarydevices.com> |
mx31/mx35/mx51/mx53/mx6: add watchdog Use a common watchdog driver for all these cpus. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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34d33b67 |
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13-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
ehci-mxc: Define host offsets Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
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8eeb19be |
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13-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Move EHCI definitions to ehci-fsl.h The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> |
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9e0081d5 |
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14-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Fix PDR0_CSI_PODF The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0 register is actually composed of two bit-fields: one pre-divider and one post-divider. This patch fixes the CCM access macros and the code using them accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> |
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df7e420b |
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14-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Add more CCM access macros Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> |
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8e99ecd7 |
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13-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc: Define architecture identifier Define ARCH_MXC for i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs. The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Kim Phillips <kim.phillips@freescale.com> |
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f2d3ae07 |
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13-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx3: Fix typo on IPU_CONF_CSI_EN Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
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de6f604d |
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24-Apr-2012 |
Troy Kisky <troy.kisky@boundarydevices.com> |
mxc_i2c: specify i2c base address in config file The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
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fa47a286 |
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10-Jan-2012 |
Helmut Raiger <helmut.raiger@hale.at> |
mmc: access mxcmmc from mx31 boards This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
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40f6fffe |
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22-Nov-2011 |
Stefano Babic <sbabic@denx.de> |
MX: serial_mxc: cleanup removing nasty #ifdef The serial driver for iMX SOCs is continuosly changed if a new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port> defines were used only to find the base address for the selected UART. Instead of that, move the base address to the board configuration file and drop all #ifdef from driver. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Helmut Raiger <helmut.raiger@hale.at> CC: John Rigby <jcrigby@gmail.com> CC: Matthias Weisser <weisserm@arcor.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org> |
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ce93dc9b |
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08-Nov-2011 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx31: Use proper IO accessor for GPR register Use proper IO accessor for GPR register. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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a6d9de43 |
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26-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: add ESD control registers This allows to initialize DDR memory in C code. Currently all mx31 boards use assembler code (lowlevel_init.S) Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
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d121d201 |
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26-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: define pins and init for UART2 and CSPI3 Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
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6d0fb3db |
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20-Oct-2011 |
Fabio Estevam <festevam@gmail.com> |
mx31: Introduce mx31_set_gpr function Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31. This function can be useful for setting a group of pins into tied to some specific peripherals. Reuse this function from the linux kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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47c5455a |
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28-Sep-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: provide readable WEIM CS accessor setup_weimcs() and some macros are added to support the setup for i.MX31 WEIM chip selects. As a compromise between verbosity and readability an ASCII-art'ish bit comment is used instead of bitfields. All i.MX31 boards have been patched to use this approach using a helper program to verify the changes. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de> |
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f0029198 |
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12-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: make HSP clock for mx3fb driver available This additionally updates mx31/generic.c by - replacing __REG() macro accesses with readl() and writel() - providing macros for PDR0 and PLL bit accesses Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> |
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610b53e2 |
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20-Sep-2011 |
Fabio Estevam <fabio.estevam@freescale.com> |
MX31: Disable watchdog during low-power modes Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes. Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt and there was no activity, the system entered into idle mode while watchdog timer was still active. Fix this by disabling watchdog timer during idle mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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6cb2e774 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: make use of GPIO framework for MX31 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
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dddb7c9f |
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05-Jul-2011 |
Matthias Weisser <weisserm@arcor.de> |
imx: Add support for USB EHCI on imx25 Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de> |
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2f22045b |
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29-Apr-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: change return value of get_cpu_rev Drop warnings in get_cpu_rev and changes the return value (a u32 instead of char * is returned) of the function to be coherent with other processors. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Detlev Zundel <dzu@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
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cd4b8a63 |
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21-Apr-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: drop warnings in get_cpu_rev Drop warnings due to recent commit ARM: mx31: Print the silicon version Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
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a770975a |
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15-Apr-2011 |
Fabio Estevam <festevam@gmail.com> |
ARM: MX31: Fix file name label Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers) renamed mx31-imx-regs.h to imx-regs.h. Change the file label accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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4adaf9bf |
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11-Apr-2011 |
Fabio Estevam <festevam@gmail.com> |
ARM: mx31: Print the silicon version Use the same method of the Linux kernel to print the MX31 silicon version on boot. Tested on a MX31PDK with a 2.0 silicon, where it shows: CPU: Freescale i.MX31 rev 2.0 at 531 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
93a0ea50 |
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12-Aug-2014 |
Andrew Ruder <andrew.ruder@elecsyscorp.com> |
arm: mx31: use common timer functions This patch moves mx31 to the common timer functions added in commit 8dfafdd - Introduce common timer functions <Rob Herring> The (removed) mx31 timer code (specifically __udelay()) could deadlock at the 32-bit boundary of get_ticks(). get_ticks() returned a 32-bit value cast up to a 64-bit value. If get_ticks() + tmo in __udelay() crossed the 32-bit boundary, the while condition became unconditionally true and locks the processor. Rather than patch the specific mx31 issues, simply move everything over to the common code. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Marek Vasut <marex@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Helmut Raiger <helmut.raiger@hale.at>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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#
0f67e09e |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add fsl_iim driver Add a fsl_iim driver common to i.MX and MPC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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#
6adbd302 |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
imx: Add useful fuse definitions Define the UID (SoC unique ID) fuses, and the fuses available for the user. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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#
8f3ff11c |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
imx: Homogenize and fix fuse register definitions IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de>
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#
abbab703 |
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22-Oct-2012 |
Troy Kisky <troy.kisky@boundarydevices.com> |
mx31/mx35/mx51/mx53/mx6: add watchdog Use a common watchdog driver for all these cpus. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
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#
34d33b67 |
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13-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
ehci-mxc: Define host offsets Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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#
8eeb19be |
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13-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Move EHCI definitions to ehci-fsl.h The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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#
9e0081d5 |
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14-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Fix PDR0_CSI_PODF The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0 register is actually composed of two bit-fields: one pre-divider and one post-divider. This patch fixes the CCM access macros and the code using them accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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#
df7e420b |
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14-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx31: Add more CCM access macros Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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#
8e99ecd7 |
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13-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc: Define architecture identifier Define ARCH_MXC for i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs. The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Kim Phillips <kim.phillips@freescale.com>
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f2d3ae07 |
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13-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mx3: Fix typo on IPU_CONF_CSI_EN Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
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de6f604d |
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24-Apr-2012 |
Troy Kisky <troy.kisky@boundarydevices.com> |
mxc_i2c: specify i2c base address in config file The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
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08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
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fa47a286 |
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10-Jan-2012 |
Helmut Raiger <helmut.raiger@hale.at> |
mmc: access mxcmmc from mx31 boards This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
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40f6fffe |
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22-Nov-2011 |
Stefano Babic <sbabic@denx.de> |
MX: serial_mxc: cleanup removing nasty #ifdef The serial driver for iMX SOCs is continuosly changed if a new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port> defines were used only to find the base address for the selected UART. Instead of that, move the base address to the board configuration file and drop all #ifdef from driver. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Helmut Raiger <helmut.raiger@hale.at> CC: John Rigby <jcrigby@gmail.com> CC: Matthias Weisser <weisserm@arcor.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
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ce93dc9b |
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08-Nov-2011 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx31: Use proper IO accessor for GPR register Use proper IO accessor for GPR register. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
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a6d9de43 |
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26-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: add ESD control registers This allows to initialize DDR memory in C code. Currently all mx31 boards use assembler code (lowlevel_init.S) Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
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d121d201 |
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26-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: define pins and init for UART2 and CSPI3 Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
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6d0fb3db |
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20-Oct-2011 |
Fabio Estevam <festevam@gmail.com> |
mx31: Introduce mx31_set_gpr function Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31. This function can be useful for setting a group of pins into tied to some specific peripherals. Reuse this function from the linux kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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47c5455a |
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28-Sep-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: provide readable WEIM CS accessor setup_weimcs() and some macros are added to support the setup for i.MX31 WEIM chip selects. As a compromise between verbosity and readability an ASCII-art'ish bit comment is used instead of bitfields. All i.MX31 boards have been patched to use this approach using a helper program to verify the changes. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
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3f480bf7 |
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12-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: make HSP clock for mx3fb driver available This additionally updates mx31/generic.c by - replacing __REG() macro accesses with readl() and writel() - providing macros for PDR0 and PLL bit accesses Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
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f0029198 |
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12-Oct-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mx31: make HSP clock for mx3fb driver available This additionally updates mx31/generic.c by - replacing __REG() macro accesses with readl() and writel() - providing macros for PDR0 and PLL bit accesses Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
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610b53e2 |
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20-Sep-2011 |
Fabio Estevam <fabio.estevam@freescale.com> |
MX31: Disable watchdog during low-power modes Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes. Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt and there was no activity, the system entered into idle mode while watchdog timer was still active. Fix this by disabling watchdog timer during idle mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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6cb2e774 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: make use of GPIO framework for MX31 processor Signed-off-by: Stefano Babic <sbabic@denx.de>
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dddb7c9f |
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05-Jul-2011 |
Matthias Weisser <weisserm@arcor.de> |
imx: Add support for USB EHCI on imx25 Adding support for USB host on imx25 using the internal PHY. Changing the name of base address define for imx31 to get some unification. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
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2f22045b |
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29-Apr-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: change return value of get_cpu_rev Drop warnings in get_cpu_rev and changes the return value (a u32 instead of char * is returned) of the function to be coherent with other processors. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Detlev Zundel <dzu@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
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cd4b8a63 |
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21-Apr-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: drop warnings in get_cpu_rev Drop warnings due to recent commit ARM: mx31: Print the silicon version Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
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a770975a |
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15-Apr-2011 |
Fabio Estevam <festevam@gmail.com> |
ARM: MX31: Fix file name label Commit 5d2c154 (IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers) renamed mx31-imx-regs.h to imx-regs.h. Change the file label accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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4adaf9bf |
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11-Apr-2011 |
Fabio Estevam <festevam@gmail.com> |
ARM: mx31: Print the silicon version Use the same method of the Linux kernel to print the MX31 silicon version on boot. Tested on a MX31PDK with a 2.0 silicon, where it shows: CPU: Freescale i.MX31 rev 2.0 at 531 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de>
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