History log of /seL4-test-master/kernel/src/arch/x86/kernel/smp_sys.c
Revision Date Author Comments
# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# 306453e3 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: set min-conditional-indent to 0

Given we use braces all the time conditional indents do not make code
cleaner.


# d0930f67 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: consistently attach return type

Add attach-return-type to astyle


# 761006e0 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: consistently align pointer with name

Run astyle with align-pointer=name


# 43b4c551 06-Jan-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Separate definition for kernel vspace root

Introduces a separate definition for vspace root that the kernel runs on. Having this
be distinct from the global vspace root allows for potential future distinction
between the global root (that is copied into all user address spaces) and the address
space that the kernel runs in.


# ee28936d 18-Jun-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SMP: Introduce ENABLE_SMP_SUPPORT

- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check


# 40c61e5c 18-Jun-2017 Anna Lyons <Anna.Lyons@data61.csiro.au>

Fix licenses (the rest)


# 93cc22b2 09-Mar-2017 amrzar <azarrabi@nicta.com.au>

smp: fix bugs when stalling remote core

- Restart TCB from inside the lock if it is waiting for anything other than IRQ
- Only replace the TCB with idle thread if it is in ThreadState_RunningVM state

Also, this makes the design generic to be shared with arm.


# f42d6363 15-Mar-2017 Anna Lyons <Anna.Lyons@data61.csiro.au>

refactor: initialise common core state in one place


# b595d71f 25-Feb-2017 amrzar <azarrabi@nicta.com.au>

x86: initialize ksActiveFPUState for APs


# eccaae51 20-Feb-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

s/D61/DATA61/ in license headers for consistency


# f10efc60 07-Feb-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Use lower memory region for AP boot code

Change AP boot code to use a memory region that is lower down, although also
smaller. As long as the boot code can fit in this smaller region booting is
more reliable as depending on the machine, bios, firmware and bootloader
varying amounts of the low memory will be available.


# cea45cd1 31-Jan-2017 Jack Suann <Jack.Suann@data61.csiro.au>

x86: Handling pending interrupts in kernel mode

This commit allows x86 to completely handle a pending interrupt without switching
out to user mode. To handle an interrupt on x86 the APIC *must* generate an exception,
prior to you being able to acknowledge it. Previously we only allow exceptions (i.e.
interrupts) to be generated outside of kernel mode when we are in user mode.

This change allows us to 'poll' for an interrupt and transition the APIC whilst in kernel
mode by enabling and taking interrupts at carefully defined points. A pending interrupt
will be stored by the exception handler, allowing us to then handle the interrupt and
acknowledge the hardware APIC. Handling is done by waiting until after we have 'left' the
kernel and are about to switch to user mode and then 'entering' the kernel again by jumping
to the interrupt entry point.

Handling interrupts entirely in kernel mode provides two advantages
* It will allow, in the future, the ability to handle kernel interrupts in situations
where we need to handle the interrupt before actually performing the hardware switch
back to user mode. This case happens where the user thread is using vt-x and so
pending interrupts do not generate an interrupt exception, but rather cause an exception
to be generated telling the system that there is a pending interrupt
* Where there are multiple pending interrupts it is more efficient to avoid additional
switches in and out of the user thread

Whilst this change does not enable pre-emption points to handle the interrupt before
returning out of `handleSyscall` it should be easily implementable with what is provided.


# e9922b74 15-Jan-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

Unify kernel stack definition/declaration and share it between architecures/modes

Rather than defining a kernel stack in random places for each
architecure for each mode (32/64) and for single/SMP modes, make the
stack definition shareable between all of the above. This is also useful
for the future ARM SMP work.


# af02927b 12-Jan-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SMP: move lock.h to architecture-independent include/smp

s/__sync_lock_test_and_set/__atomic_exchange_n in lock.h


# 5037717c 11-Jan-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Explicitly define kernel stack size

This commit changes the previous hard coded 4K kernel stack size
to being a configurable power of 2 sized stack


# a1eddc75 23-Nov-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

x64: Make boot paging structures `VISIBLE`

These structures are used from the boot code in traps.S and must be
`VISIBLE` to prevent the compiler removing them


# a0cb9e67 09-Nov-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

x64: Support multiple kernel stacks

Adds support for per-core kernel stacks through the use of
thread local storage and swapgs. In addition to the main
kernel stack the IRQ stack also needs to be made per core


# 27afc1bd 20-Nov-2016 amrzar <azarrabi@nicta.com.au>

x86: add logical id mapping for x2APIC IPI boradcasting


# ffd0f34b 08-Nov-2016 amrzar <azarrabi@nicta.com.au>

Clean up x86KScurInterrupt:

1. Remove the locking dependancy on the value of x86KScurInterrupt
2. Remove confusing set/unset of x86KScurInterrupt


# a228c492 30-Oct-2016 amrzar <azarrabi@nicta.com.au>

Incuede TLBBitmap in PD to keep track of cores currently accessing this PD


# 25bb9437 24-Oct-2016 amrzar <azarrabi@nicta.com.au>

SELFOUR-635: support for TCB operations
This will update TCB invocations to consider multicore environment, this may include:
- adds the affinity invocation to transfer TCB between different cores and update TCB structure for core ID
- checking the thread/core state before performing TCB operation, e.g. deleting the runnable TCB, etc


# 1887ae9d 13-Oct-2016 amrzar <azarrabi@nicta.com.au>

Update SMP idle thread handling


# e63be664 30-Sep-2016 amrzar <azarrabi@nicta.com.au>

SELFOUR-631: implement CLH lock and barrier infrastructure


# 2cbc7123 28-Sep-2016 amrzar <azarrabi@nicta.com.au>

SELFOUR-630:preliminary booting application processors
- update core detection code and Kconfig file
- update kernel stack managment so that BSP does not use boot stack before IPI APs
- move arch dependant data to a single structure
- add cache line size to Kconfig
- add cpu indexing and apic id mapping
- boot APs to halting state
- add guard for kernel stack if there is only one core


# 4044e204 21-Sep-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

Revert "Merge pull request #358 in SEL4/sel4 from ~AZARRABI/sel4:multicore to master"

This reverts commit ce2f666bb811c5e4c779829fcb09d5a189ebcdbb, reversing
changes made to dc183f96b81f2344d7d0d910fc430f924eaae940.


# 8ffc3531 21-Sep-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

Revert "[STYLE_FIX]"

This reverts commit d29f743bbcc3acff2f61b40dedb4fe0839db38b8.


# d29f743b 21-Sep-2016 Bamboo <bamboo@keg.ertos.in.nicta.com.au>

[STYLE_FIX]


# fbc071b4 12-Sep-2016 amrzar <azarrabi@nicta.com.au>

SELFOUR-630:preliminary booting application processors
- update core detection code and Kconfig file
- update kernel stack managment so that BSP does not use boot stack before IPI APs
- move arch dependant data to a single structure
- add cache line size to Kconfig
- add cpu indexing and apic id mapping
- boot APs to halting state
- add guard for kernel stack if there is only one core