#
79da0792 |
|
01-Mar-2020 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
Convert license tags to SPDX identifiers This commit also converts our own copyright headers to directly use SPDX, but leaves all other copyright header intact, only adding the SPDX ident. As far as possible this commit also merges multiple Data61 copyright statements/headers into one for consistency.
|
#
554f812d |
|
08-Nov-2016 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
mcs: scheduling context donation over ipc After this commit, threads blocked on an endpoint can recieve a scheduling context from the thread that wakes the blocked thread.
|
#
3207abee |
|
20-Mar-2019 |
Curtis Millar <curtis.millar@data61.csiro.au> |
RFC-3: Update context for x86 to use FS and GS. TLS_BASE virtual register is replaced with FS_BASE and GS_BASE virtual registers. The FS_BASE and GS_BASE virtual registers are moved to the end of the context so they need not be considered in the kernel exit and entry implementation. Removed tracking of ES, DS, FS, and GS segment selectors on kernel entry and exit. ES and DS are clobbered on kernel entry with the RPL 3 selector for a DPL 3 linear data segment. FS is clobbered on exit with the RPL 3 selector for the DPL 3 segment with FS_BASE as the base. This is done on exit to reload the value from the GDT. GS is clobbered on exit with the RPL 3 selector for the DPL 3 segment with GS_BASE as the base. This is done on exit to reload the value from the GDT. Kernel entry and exit code is refactored, simplified, and improved in light of the above changes. x64: update verified config to use fsgsbase instr The verification platform for x64 relies on the fsgsbase instruction.
|
#
f6e5e218 |
|
20-Mar-2019 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
Remove symlinked libsel4 files from include dir These files can be included normally using libsel4 include paths. This removes situations where the same file is available under different include paths due to symlinking into different directory structures.
|
#
761006e0 |
|
18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: consistently align pointer with name Run astyle with align-pointer=name
|
#
c2f6d48b |
|
03-Aug-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
ia32: Set sensible defaults for FS and GS selectors 99.99% of the time this is what the user will want these set to in every thread, so we might as well just set the sensible default here. Nothing stops the user overriding this default later. This change will be unobservable to any existing (non broken) system
|
#
0707ae87 |
|
23-Feb-2017 |
amrzar <azarrabi@nicta.com.au> |
Move arch independent functions to generic files and HAVE_FPU config
|
#
a63632a0 |
|
12-Dec-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Extract common parts of `sanitiseRegister` Creates a `Mode_sanitiseRegister` and factors out the common parts of the 32 and 64 `sanitiseRegister` into a general x86 one
|
#
5c7bd1df |
|
05-Dec-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Explicitly define VCPU general purpose registers Previously the GP registers for a VCPU were defined in the 32-bit arch registerset. This does not actually make sense as the mode for the VCPU should be decoupled (and well defined) regardless of the execution mode of the kernel. This commit provides an explicit definition and register order for VCPU GP registers.
|
#
ed95f84a |
|
22-Sep-2016 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
SELFOUR-413: changes for verification Avoid using ptrs to arrays at all Another macrofull change brought to your by verification. This should avoid nasty proofs about const pointers.
|
#
b827ad37 |
|
15-Jul-2016 |
Anna Lyons <Anna.Lyons@nicta.com.au> |
SELFOUR-413: refactor libsel4 fault API This is a *breaking API change* This commit: * makes seL4_Fault_tag_t common between the kernel and libsel4 * deprecates the existing functions from sel4/messages.h includes * introduces a new fault API in sel4/faults.h and * sel4/sel4_arch/faults.h * deprecates seL4_GetTag(), as the function did not work without the user calling seL4_SetTag() first (seL4_MessageInfo is passed in registers and not set in the IPC buffer) * removes previously deprecated functions (deprecated prior to 3.0.0) * updates the seL4 manual to reflect the changes
|
#
33a771d3 |
|
12-Jul-2016 |
Anna Lyons <Anna.Lyons@nicta.com.au> |
Split fault types into arch/generic Prior to this commit faults were separate per architecture. This commit extracts the common fault types and introduces arch specific faults, reducing code duplication across architectures.
|
#
7fbde1bb |
|
14-Jun-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
SELFOUR-287: 32-bit vt-x implementation This is an implementation of vt-x for x86 kernels running in ia32 mode.
|
#
8ad4e1ba |
|
12-Oct-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
ia32: Always forbid setting Trap Flag If the user is allowed to set the Trap Flag then it can cause a kernel exception by setting a thread to have TF enabled and running at a 'sysenter' instruction, which will result in a debug exception being generated after the sysenter instruction has executed and in priviledged mode.
|
#
d1d45681 |
|
11-Oct-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Define FLAGS bits instead of having magic numbers
|
#
6294225c |
|
10-Oct-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Rename [ER]FLAGS to FLAGS Having a different name for the FLAGS register creates an unnecessary difference between ia32 and x86_64 code since regardless of the name/size the bits in the register mean exactly the same thing
|
#
e2bf4881 |
|
10-Oct-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x64: Refactor Arch_initContext Split Arch_initContext into mode and arch portions
|
#
bebfcf6d |
|
23-Jun-2016 |
Kofi Doku Atuah <kofi.dokuatuah@nicta.com.au> |
SELFOUR-499: X86, ARM: Add userspace invocations for hardware debugging This commit implements the body of SELFOUR-499. The API exposes the x86 DR0-7 and ARM coprocessor 14 features to userspace by virtualizing them as context- switched registers in the TCB. Implemented as TCB invocations. This feature is only built when CONFIG_HARDWARE_DEBUG_API is selected. * Add low-level support routines for setting, unsetting, getting, enabling and disabling breakpoints. * Add support for single-stepping as well. ^ Single-stepping is not supported on ARMv6 since the hardware doesn't have support. ^ ARM implements single-stepping as instruction breakpoints configured to fault on every instruction -- this is achieved through the "mismatch" mode, which is only supported from ARMv7 onwards. * Also support explicit software break requests, a la "BKPT" and "INT $3". * New invocations: * seL4_TCB_SetBreakpoint(). * seL4_TCB_GetBreakpoint(). * seL4_TCB_UnsetBreakpoint(). * seL4_TCB_ConfigureSingleStepping(). * New constants: ^ Event types: ^ seL4_InstructionBreakpoint. ^ seL4_DataBreakpoint. ^ seL4_SoftwareBreakRequest. ^ Access types: ^ seL4_BreakOnRead. ^ seL4_BreakOnWrite. ^ seL4_BreakOnReadWrite. ^ Exports: ^ seL4_NumHWBreakpoints. ^ seL4_NumExclusiveBreakpoints. ^ seL4_NumExclusiveWatchpoints. ^ seL4_NumDualFunctionMonitors. ^ seL4_FirstBreakpoint. ^ seL4_FirstWatchpoint. ^ seL4_FirstDualFunctionMonitor. See documentation in the seL4 API manual.
|
#
74f620d1 |
|
29-Jun-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Rename FaultEIP and NextEIP to FaultIP and NextIP to allow for 32/64-bit independent code
|
#
198f6c84 |
|
01-Jun-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Move 32-bit specific files into 'mode' directories, and only build if IA32
|