History log of /seL4-test-master/kernel/src/arch/riscv/head.S
Revision Date Author Comments
# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# a6c9dcf8 06-Aug-2019 Yanyan Shen <yanyan.shen@data61.csiro.au>

riscv: Use sscratch for per-core kernel stack

When SMP is enabled, the sscratch register is used to
contain the per-core kernel stack instead of the current
running thread. We get the current running thread from the
top of the kernel stack.


# 3914931b 18-Mar-2019 Siwei Zhuang <siwei.zhuang@data61.csiro.au>

RISCV: Remove hartid and DTB parsing from the boot code.


# 4b3ad785 28-Feb-2018 Hesham Almatary <hesham.almatary@unsw.edu.au>

RISC-V: Disable relaxation when loading gp


# 83ba0847 20-Feb-2018 Hesham Almatary <hesham.almatary@unsw.edu.au>

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64