History log of /seL4-test-master/kernel/libsel4/arch_include/arm/interfaces/sel4arch.xml
Revision Date Author Comments
# 6ad15c0f 26-Oct-2020 Oliver Scott <Oliver.Scott@data61.csiro.au>

trivial: clean up code for C parser

Remove unused cases and add break in switch statements.
Add conditions to sel4arch.xml.
Change guard in capdl printing to correct TK1_SMMU.
Set KernelArmSMMU default to off.
Add types to aarch32 syscall_stub_gen.py.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 5a7d96a4 21-Oct-2020 Kent McLeod <kent@kry10.com>

SMMU: Add initial write up of design documentation

- Add a chapter in the Hardware I/O Section
- Link API documentation back to chapter.

Co-authored-by: Qian Ge <Qian.Ge@data61.csiro.au>
Signed-off-by: Kent McLeod <kent@kry10.com>


# 81f9a88f 04-Feb-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: supporting probing fault status

Providing system calls that enquiry the fault status in context
banks and in SMMU overall.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 1ef6e6c7 16-Jan-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: supporting unbind context banks

Providing system calls on stream ID caps that unbinds its
context banks. Any future transaction using this stream ID
will result on faluts.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 38ed1046 14-Jan-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: supporting unassign vspace in context banks

Providing a system call that removes an assigned vspace root from its
context bank. This operation causes the context bank being disabled
as it does not have a valid vspace root after the unassignment.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# b07ea94c 10-Dec-2019 Qian Ge <qian.ge@data61.csiro.au>

SMMU: TLB invalidation system calls

Providing system calls for conducting TLB invalidation operations
on all TLB entries or entries in a context bank.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 6e591117 19-Nov-2019 Qian Ge <qian.ge@data61.csiro.au>

SMMU: binding stream ID to context banks

Providing system calls that binds context banks to stream IDs.
Once the stream ID is bound, the transaction using that SID is
enabled.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 73e062bd 12-Nov-2019 Qian Ge <qian.ge@data61.csiro.au>

SMMU: assigning vspace to context banks

Supporting user-level applications to assign vsapce root to context
banks through system calls. This commit also configures the context
bank according to stage 1 or stage 2 requirement.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 0cf122a0 09-Oct-2019 Qian Ge <qian.ge@data61.csiro.au>

SMMU: system calls for creating SID and CB caps

Providing system calls on stream ID control cap and context bank
control cap for creating stream ID and context bank caps.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 1a9756f6 09-Sep-2019 Qian Ge <qian.ge@data61.csiro.au>

SMMU: basic driver for init and probing

Introducing the driver in kernel for detecting SMMU features
and initialise the hardware.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# f795e7c0 23-Jun-2019 Alison Felizzi <Alison.Felizzi@data61.csiro.au>

arm: New virtual PPI event fault type

This commit introduces a new fault type, seL4_Fault_VPPIEvent.

This change means the kernel can reserve PPI interrupts and virtualise
them via delivering the irq to the active vcpu through a
specific fault. This enables multiplexing PPI IRQs across multiple VCPUS
which requires correctly masking and unmasking the IRQ depending on
which VCPU is running.

A new VCPU invocation, seL4_ARM_VCPU_AckVPPI is also added for
acknowledging the handling of the IRQ. This takes an IRQ as a parameter
but will only accept IRQ numbers that are sent as VPPIEvent faults.

Co-authored-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
Co-authored-by: Kent McLeod <Kent.Mcleod@data61.csiro.au>


# b4e529ab 01-Jul-2019 Jimmy Brush <code@jimmah.com>

trivial: arm: Improve object method docs


# a4d6bf85 28-Feb-2016 amrzar <Amirreza.Zarrabi@data61.csiro.au>

SELFOUR-161: Merge Page_Remap with Page_Map

- Remove Remap function from seL4 API for arm, x86, riscv and the
respective invocation implementation.
- Update Map as replacement for Remap
- Update manual

This allows a change of rights if the frame being mapped is already
mapped in at the given vaddr. To map a page to a different address,
unmap it first.

Co-authored-by: Hesham Almatary <hesham.almatary@data61.csiro.au>
Co-authored-by: Anna Lyons <Anna.Lyons@data61.csiro.au>
Co-authored-by: Victor Phan <Victor.Phan@data61.csiro.au>
Co-authored-by: Kent McLeod <Kent.Mcleod@data61.csiro.au>


# 84e6d4cd 12-May-2019 Sylvain Gauthier <sylvain.gauthier@data61.csiro.au>

Added IRQ routing to specific core for ARM

Add a new syscall, `seL4_IRQControl_GetTriggerCore`, to get a IRQHandler
with specific target core(s) and trigger method. Only available in SMP
mode.


# f4f6b156 03-Sep-2018 Mitchell Buckley <mitchell.buckley@data61.csiro.au>

SELFOUR-1491: verification updates

- renamed an architecture label so that it begins with ARM.
- changed setIRQTrigger so that it takes a boolean value instead of an int.
- Arch_decodeIRQControlInvocation converts the second argument (trigger)
to a boolean immediately.


# eb0553fa 27-Jun-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

SELFOUR-1491: add seL4_IRQCOntrol_GetTrigger

Add a new invocation which allows an irq handler capability to be
obtained with a specific trigger method (edge or level). Obtaining
this capability modifies the GIC state.


# 5539b9e8 27-Jun-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

docs: s/depth of 32/depth equivalent to the wordsize


# 996cb73d 10-May-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

manual: correct vspace/pd usage for ARM invocations

Use vspace for the top-level paging structure and page directory specifically for page directories.


# 17b901d7 09-May-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

manual: clarify VSpace as top-level paging structure

This change updates the vspace chapter to separate the high-level concept of a VSpace from the
architectually defined objects. It also updates the various names for the vspace parameter to all be
vspace.


# 804fc549 09-May-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

manual: update Page map documentation

- remove PD, PT references
- make clear that the middle level structures need mapping or an error is returned


# ac015475 07-May-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

manual: remove hard-coded PD, PT and Page invocations

- increases the maintainability of the docs
- move descriptions of methods to the API reference
- remove hardcoded invocations in manual

This commit removes the content completely from vspace.tex, as it is out of date and needs
restructuring. The next commit does the restructuring.


# 56abae43 09-May-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

manual: remove hard-coded ASID invocations

- move documentation to API ref
- create tables pointing to the API ref for these objects


# 8fd604eb 23-Apr-2018 Adam Felizzi <a.felizzi@student.unsw.edu.au>

manual: Added <docref> XML Tag to Doxygen

Introduced a new Doxygen XML tag '<docref>'. The intention of
this tag is to indicate a section of text in the Doxygen XML that
will contain a reference to another section in the Manual e.g.
"See \autoref<sec:x>". As other generation formats aren't aware of
other chapters/sections in the manual, the <docref> encapsulation
allows it to omit the text from the output. The Latex generator
has been modified to continue parsing the 'docref' contents.


# 3a21701a 28-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

libsel4/arm: Move VCPU to the common interface


# 8e3598bd 28-Jun-2017 Kent McLeod <Kent.Mcleod@data61.csiro.au>

SELFOUR-912: migrate ARM docs from latex to xml


# 07f94833 18-Jun-2017 Anna Lyons <Anna.Lyons@data61.csiro.au>

libsel4: fix licenses

- some were incorrectly marked GPL (libsel4 is BSD)
- update NICTA --> DATA61 etc
- fix tags D61 --> DATA61
- update year to 2017


# 161b841a 25-May-2017 Stephen Sherratt <Stephen.Sherratt@data61.csiro.au>

manual: In api docs, rename "IO" to "I/O"


# c2ca76a3 24-May-2017 Stephen Sherratt <Stephen.Sherratt@data61.csiro.au>

manual: Friendly names for arch-specific methods


# 3498705f 23-May-2017 Stephen Sherratt <Stephen.Sherratt@data61.csiro.au>

manual: Add basic names and labels to interfaces


# c7471db9 23-May-2017 Stephen Sherratt <Stephen.Sherratt@data61.csiro.au>

manual: Trivial whitespace


# 6428e959 12-Jan-2017 amrzar <azarrabi@nicta.com.au>

aarch64: Add aarch64 libsel4 implementation


# 2fea9a0f 18-Jul-2016 Anna Lyons <Anna.Lyons@nicta.com.au>

SELFOUR-567: use seL4_CapRights_t from libsel4

This change

* changes seL4_CapRights from the kernel to be seL4_CapRights_t in
libsel4
* deprecates the duplicated seL4_CapRights in libsel4, which is
now the bitfield generated type seL4_CapRights_t.
* fixes all usages in kernel and libsel4

Impact: for verification, this will require the type to change name
from cap_rights to seL4_CapRights_t.
This is a breaking libsel4 API change, although most code uses
seL4_AllRights or similar constants, which will not break
at a source level as these constants have been updated.


# ee75f086 16-Oct-2016 amrzar <azarrabi@nicta.com.au>

update #ifdef to #if in auto generated files


# f14dcdd0 15-Jun-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

arm-hyp: Add conditions to invocations


# 41603a26 01-Jun-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

Correct merge of master


# 879d9724 13-May-2016 Yanyan Shen <yanyan.shen@nicta.com.au>

arm/tk1: a checkpoint for SMMU implementation


# 1a1110a0 14-Jan-2016 amrzar <azarrabi@nicta.com.au>

Modify Kconfig and Makefile for aach32 as sel4_arch
libsel4: updates to include aarch32 as sel4_arch


# e653f8f6 09-Jul-2015 Wink Saville <wink@saville.com>

Streamline libsel4 and remove its libc dependencies.

There are now separate libs for benchmark, assert, printf, putchar
start/stop:

libs/libsel4benchmark
libs/libsel4assert
libs/libsel4printf
libs/libsel4putchar
libs/libsel4startstop

The primary changes are introducing sel4/sel4.h and removing std* types
plus porting assert and IO code from the kernel to libsel4assert,
libsel4printf, libsel4putchar.

This means the code within libsel4 and the newlibs do not overload any
typical libc entities. Instead the libraries use types like
seL4_Uint32 ... instead of uint32_t. And printf is now seL4_Printf and
assert is seL4_Assert ....

Finally, the only file modified that effects kernel code is
kernel/tools/bitfield_gen.py. It needed to be modified as it generates
files for both kernel and user space. And for user space the generated code
(types_gen.h) needed to use the new types and asserts. The changes should
not change what is generated for the kernel and I did a comparison of
kernel_final.{c|s} before and after my change and the only differences
were time stamps.

Bug: #15 Streamline kernel/libsel4 and remove its libc dependencies


# a9111d4b 09-Mar-2015 Adrian Danis <Adrian.Danis@nicta.com.au>

libsel4: Support multiple struct types for the generated syscall stubs


# 2732406e 17-Jul-2014 Adrian Danis <Adrian.Danis@nicta.com.au>

Recomment of branch getpaddr on release snapshot


# a318446f 07-Jul-2014 TrustworthySystems <gatekeeper@sel4.systems>

Recommit of arm_hyp branch on release snapshot


# 91b7da86 17-Jul-2014 TrusthworthySystems <gatekeeper@sel4.systems>

Release snapshot