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512a0200 |
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19-Mar-2020 |
Qian Ge <qian.ge@data61.csiro.au> |
replacing all ifndef with pargma once All the kernel header files now use pargma once rather than the ifndef, as the pre-processed C files do not change while header files are protected with pargma once. This will also solve any naming issues caused by ifndef.
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79da0792 |
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01-Mar-2020 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
Convert license tags to SPDX identifiers This commit also converts our own copyright headers to directly use SPDX, but leaves all other copyright header intact, only adding the SPDX ident. As far as possible this commit also merges multiple Data61 copyright statements/headers into one for consistency.
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f6e5e218 |
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20-Mar-2019 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
Remove symlinked libsel4 files from include dir These files can be included normally using libsel4 include paths. This removes situations where the same file is available under different include paths due to symlinking into different directory structures.
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d0930f67 |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: consistently attach return type Add attach-return-type to astyle
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761006e0 |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: consistently align pointer with name Run astyle with align-pointer=name
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3d10ef0c |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: correct parenthesis padding Use astyle's unpad-paren to unpad all parentheses that are not included by pad-header, pad-oper, and pad-comma.
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cbb862d8 |
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11-Apr-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
trivial: s/framSizeConstants/frameSizeConstants
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f0594ac9 |
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28-Jan-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Implement IBRS based Spectre mitigations Provides the ability to enable the IBRS hardware Spectre mitigation strategies, as well as completes the software mitigation by disabling jump tables in compilation. The hardware mitigations are largely provided "for completeness" in the hopes that they eventually become less expensive. For the moment there is no reason to turn on any beyond STIBP if running in multicore
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abe99d3a |
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14-Jan-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Export PMC to user Provides an option that, on kernel init, enables user reading of the performance monitoring counters. This is a step towards removing the dependence on seL4_DebugRun for user level benchmarking/profiling
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7594ffa8 |
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08-Oct-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Explict enum for fault types This creates a similar structure as ARM, where an `enum` is created with the `#define` values from libsel4. Having these values as enum types provides a 'real' C symbol for verification.
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f85fb62f |
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21-Aug-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
SELFOUR-1062: Hide all VT-x related code behind #ifdef guards The VT-x implementation is not going to be verified at the moment, and so the code for it needs to be hidden from verification, which we do by #ifdef'ing it out if the VT-x is not enabled. As a result the VT-x configuration depends on a non verification target
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a9e1f517 |
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21-Aug-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
SELFOUR-1062: Hide all IOMMU related code behind #ifdef guards The IOMMU implementation is not going to be verified at the moment, and so the code for it needs to be hidden from verification, which we do by #ifdef'ing it out if the IOMMU is not enabled. As a result the IOMMU configuration depends on a non verification target
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57fa0e0f |
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07-Aug-2017 |
Hesham Almatary <hesham.almatary@data61.csiro.au> |
Share linker.h between architectures
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b0c744b2 |
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09-May-2017 |
Matthew Brecknell <Matthew.Brecknell@data61.csiro.au> |
SELFOUR-881: add ghost state updates for x86-64
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8c02bc13 |
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10-Apr-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
x64: implement seL4_BenchmarkFlushCaches by moving the ia32 implementation up a level to x86 and implementing the syscall stub.
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0ef7c693 |
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14-Feb-2017 |
Hesham Almatary <hesham.almatary@data61.csiro.au> |
x86: define L1_CACHE_LINE_SIZE_BITS as with ARM
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7fbde1bb |
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14-Jun-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
SELFOUR-287: 32-bit vt-x implementation This is an implementation of vt-x for x86 kernels running in ia32 mode.
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c3370f77 |
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19-Oct-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Remove circular include x86/arch/machine/hardware.h gets include via types.h (through the compound_types.h header). As this header is defining compound types it really only needs access to the basic types (i.e. stdint.h)
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45622671 |
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26-Sep-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Define large frame types
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2320d909 |
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29-Sep-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Fixup IOMMU implementation Adds a mapping type to frame caps that tracks what kind of hierarchy the cap is mapped into; an MMU, IOMMU and in the future an EPT structure. Additionally the IOMMU code is updated to have correct functionality and be verification friendly.
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f34f354a |
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16-Aug-2016 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
SELFOUR-617: one source of memory object sizes Adds the following constants to libsel4 and uses them in the kernel. seL4_SectionSize (arm) seL4_SuperSectionSize (arm) seL4_HugePageSize (x86 - pae) seL4_LargePageSize (arm) seL4_DataFault seL4_InstructionFault
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775ca8c9 |
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14-Feb-2016 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Fix clflush invocation in flushCacheLine This fixes flushCacheLine to flush the line pointer to be vaddr, not the cache line of the stack location holding the vaddr pointer
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d20ca20a |
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13-Jan-2016 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Rename ia32->x86 This is a stylistic commit to make names of variables/constants and functions in the kernel more consistent. That is, things that are not IA32 specific, but are generic x86, get renamed to having an x86 name
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4e81ed05 |
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05-Nov-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Extract 32-bit specific vspace functions in mode/vspace.c
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ef85f94a |
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05-Nov-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Rename constants and functions to have X86 prefix instead of IA32 prefix
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0ecff9f3 |
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09-Nov-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
unsigned int -> word_t
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2d61910e |
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09-Nov-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
Rename uint32_t -> word_t in any relevant places
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914741ea |
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27-May-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Make x86 the name of the architecture instead of IA32 IA32 is 32bit version of the x86 architecture. Whilst only IA32 is supported, much of the code is generic x86. Using a generic x86 architecture will aid in future 64bit support
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