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065cc0f4 |
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18-May-2020 |
Michael Yoo <michael.yoo@data61.csiro.au> |
riscv: give dtb to kernel - Pass the dtb that is loaded to the kernel. Signed-off-by: Michael Yoo <Michael.Yoo@data61.csiro.au>
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392622a8 |
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23-Mar-2020 |
Siwei Zhuang <siwei.zhuang@data61.csiro.au> |
riscv: rename sptbr to satp The sptbr register is renamed to satp in RISC-V privilege spec v1.10.
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9f904ed2 |
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06-Mar-2020 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
convert license headers to SPDX Includes license review of 3rd-party files, adding missing upstream headers, and moving the UNSW OZPLB license into its own file rather than replicating it in the header.
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6e8ec638 |
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21-Oct-2019 |
Simon Shields <simon.shields@data61.csiro.au> |
elfloader: pick serial driver at runtime On ARM, each serial driver now has an ELFLOADER_DRIVER(...), which contains information about the compatible strings the driver matches, the driver type and an "init" function for the driver to do setup. hardware_gen is now used by the ELF loader to generate a list of interesting devices at compile-time, which go in a header file "devices_gen.h". The ELFLOADER_DRIVERs are put into a special "_driver_list" section by the linker, and accessed as an array via the special __start__driver_list and __stop__driver_list linker symbols. At boot, the ELF loader calls initialise_devices(), which does the following: for each device in devices_gen.h for each driver in elfloader_drivers array if (device compat matches driver compat) call driver->init(device, driver) end if end for end for For serial drivers, the serial driver calls uart_set_out with the elfloader_device that should be the output for the elfloader from the driver->init function. There is a 'common' plat_console_putchar implementation which uses the dynamically picked uart output. This eliminates the need for a lot of the platform-specific code we have. This implementation could one day be replaced with a in-ELF loader device tree. This could also (possibly) be used to handle dynamically picking SMP core bringup mechanisms. As all RISC-V platforms use SBI to provide a serial port, RISCV is only modified to register the SBI putc implementation as the fputc implementatin.
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030d83bf |
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11-Nov-2019 |
Simon Shields <simon.shields@data61.csiro.au> |
elfloader: improve EFI support Rather than using a bunch of assembly code to relocate the ELF loader, we use gnu-efi[1] to build an EFI executable. This approach handles things like nested structs better, by including a "proper" way to handle ELF relocations. [1]: https://sourceforge.net/projects/gnu-efi/
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0c28d76b |
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20-Oct-2019 |
Damon Lee <Damon.Lee@data61.csiro.au> |
trivial: Fix typo This fixes a typo that afb5f848 introduces.
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84b3d8ab |
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17-Oct-2019 |
Damon Lee <Damon.Lee@data61.csiro.au> |
trivial: Style changed files
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afb5f848 |
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17-Oct-2019 |
Damon Lee <Damon.Lee@data61.csiro.au> |
elfloader: Prefer using the CPIO DTB if it exists The elfloader will now prioritise passing through the DTB that's included in the CPIO archive.
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7abc6b22 |
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09-Oct-2019 |
Yanyan Shen <Yanyan.Shen@data61.csiro.au> |
elfloader: Add SMP support for RISCV
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2ea7ee57 |
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22-Jul-2019 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
elfloader-tool: Add fence.i before kernel start This fence operation ensures that writes to memory that will be executed are visible to the instruction stream.
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65daeb20 |
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19-May-2019 |
Yu Hou <Yu.Hou@data61.csiro.au> |
elfloader-tool: explicitly link config libs explicitly link kernel_autoconf and elfloader_Config since the global config lib is going to be remove
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3e609e09 |
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12-May-2019 |
Siwei Zhuang <siwei.zhuang@data61.csiro.au> |
RISCV: Moving platform files to arch The SBI is defined in the RISCV spec that all platforms should follow. Moving related files from plat to arch.
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c5735119 |
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22-Nov-2018 |
Simon Shields <simon.shields@data61.csiro.au> |
elfloader: pass DTB from bootloader to seL4 on ARM On ARM, we expect the physical address of the dtb to be passed in r2 on aarch32 or x0 on aarch64. RISC-V supplies a DTB in a1, but we currently don't pass it to the kernel. The elfloader then moves the dtb to immediately after where the kernel is loaded in memory, and passes that address on to the kernel. If there is no bootloader provided DTB, the elfloader will pass 0 to the kernel as the start address of the DTB.
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38e21967 |
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01-Apr-2019 |
Siwei Zhuang <siwei.zhuang@data61.csiro.au> |
RISCV: Map the elfloader to a separate page table on 64-bit machine.
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c85fda55 |
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07-Apr-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
trivial: style this repo
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2d966284 |
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18-Mar-2019 |
Siwei Zhuang <siwei.zhuang@data61.csiro.au> |
RISCV: Stop passing hartid and DTB to the seL4 kernel.
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e5306979 |
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30-Jul-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
trivial: use BIT in riscv boot.c
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9c7f6d95 |
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19-Jul-2018 |
Chris Guikema <chris.guikema@dornerworks.com> |
riscv: Support 2 MiB kernel mappings in the elfloader Change-Id: Iebdee033d7393a35b2a58cbae553c735bfc40f2f
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da8ea102 |
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19-Jul-2018 |
Chris Guikema <chris.guikema@dornerworks.com> |
riscv: clean up elfloader mappings. Change-Id: Ic59e531e1e552d8fb663ff21b59b984f820c289a
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87642544 |
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05-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Abstract kernel window mapping This makes the kernel window mapping slightly more robust by not making assuptions on the virtual address of the kernel, and instead using the virtual address provided by the kernel image.
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79d529df |
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05-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Remove unused variables
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13a5364d |
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03-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
elfloader: Remove more deadcode
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99cbcd51 |
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03-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
elfloader: Remove RISC-V multicore stubs
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ab55e8ed |
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03-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
elfloader: Deduplicate a lot of arch-riscv/boot.c
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8eb0ced4 |
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03-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
elfloader: riscv init_kernel_t rename
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2a35c4ab |
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03-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Pass physical dtb address to the kernel Passes the physical address of the dtb to the kernel instead of the null mapping. Also document the lack of passing any dtb to secondary cores despite using the same init_kernel_t entry point
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900601d4 |
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03-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Remove nonsense dtb mappings This removes code that mappings the dtb at the NULL virtual address. It makes no sense to map it here as it will cease to be available to the kernel the moment it activates the actual kernel window.
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49a85bfd |
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03-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
elfloader RISC-V: Remove duplicate ELF code
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23fc00c3 |
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03-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
elfloader: remove duplicate NULL definition
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2d7f29da |
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02-Apr-2018 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
elfloader: Suppress RISC-V unused warning spam
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744c6664 |
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02-Apr-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
riscv: fix licenses - Add missing licenses - NICTA -> DATA61
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afa707f0 |
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29-May-2016 |
Hesham Almatary <Hesham.Almatary@nicta.com.au> |
RISCV port
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