| #
edf67eb1 |
|
11-Oct-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
platsupport: Consistent manipulation of control bits
This makes the 'ctrl' bits in the spt timer have a consistent manipulation. Specifically
* Only enable the timer when a timeout is set. The timer was already disabled after an IRQ
was received to mark the conclusion of a timeout, yet was blindly enabled in spt_start
and re-enabled in set_timeout
* Do not disable the free running counter in the middle of setting a timeout. Completely
clearing the 'ctrl' bits before setting them is just completely unnecessary
|
| #
b8c12145 |
|
11-Oct-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
platsupport: Fix time calculation
The time calculation had two inaccuracies
* Significant bits of information were thrown away by division
* It was being multiplied by the wrong prescaler
The solution is to take advantage of the free running timer only being 32-bits and multiply
into a 64-bit value and to remove incorrect prescaler usages.
|
| #
44dcd9d2 |
|
23-Jul-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
rpi: handle any pending irqs in spt_init
|
| #
0f7e8683 |
|
23-Jul-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
rpi3: enable free running counter in spt
this allows us to read the time
|
| #
a3ea247a |
|
23-Jul-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Refactor rpi3 spt driver and implement ltimer
- remove pstimer support from spt, rearrange
- implement ltimer with spt
|