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0d355519 |
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18-Nov-2020 |
Curtis Millar <curtis.millar@data61.csiro.au> |
riscv: Implement benchmark log buffer Can now perform benchmarks on the kernel using the log buffer to trace kernel behavior. Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>
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5c1b81d9 |
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03-Sep-2020 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
libsel4: fix license tags These files should have been released under BSD-2-Clause in the first place (as per parent LICENSE.md file). Closes #245 Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>
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a221ee1c |
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05-Apr-2020 |
Saer Debel <saer.debel@data61.csiro.au> |
Enabled IPC debug features under new config Introduced a new config flag to enable userError format strings to be written to the IPC buffer. Another config bool has been introduced to toggle printing the error out and this can also be set at runtime. Signed-off-by: Saer Debel <saer.debel@data61.csiro.au>
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512a0200 |
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19-Mar-2020 |
Qian Ge <qian.ge@data61.csiro.au> |
replacing all ifndef with pargma once All the kernel header files now use pargma once rather than the ifndef, as the pre-processed C files do not change while header files are protected with pargma once. This will also solve any naming issues caused by ifndef.
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79da0792 |
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01-Mar-2020 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
Convert license tags to SPDX identifiers This commit also converts our own copyright headers to directly use SPDX, but leaves all other copyright header intact, only adding the SPDX ident. As far as possible this commit also merges multiple Data61 copyright statements/headers into one for consistency.
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dadfb1b6 |
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11-Feb-2020 |
Siwei Zhuang <siwei.zhuang@data61.csiro.au> |
trivial: Bugfix, use the correct config macro Use the correct config macro to enable code injection.
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c45f2f01 |
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16-Jul-2019 |
Curtis Millar <curtis.millar@data61.csiro.au> |
mcs: libsel4 for RISC-V This uses the aarch64 code as a basis for implementing the full set of new and updated libsel4 functions for RISC-V.
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15091664 |
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20-Mar-2019 |
Curtis Millar <curtis.millar@data61.csiro.au> |
Add syscall for setting the current TLS register. Some platforms and configurations do not allow user code to change the value of the register used for TLS. On these architectures a syscall can be used to allow the kernel to update the register on their behalf. This does not immediately update the value in the user context on many configurations as the values are only stored in the user context on a context switch.
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b6417f21 |
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20-Mar-2019 |
Curtis Millar <curtis.millar@data61.csiro.au> |
Remove platform IPC buffer register. This removes the assumption that each platform sotres the IPC buffer address in a platform-specific register. The IPC buffer address is instead stored in a thread-local variable in libsel4 which must be initialised by the runtime.
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7fc45c4e |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: set code width to 120
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d0930f67 |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: consistently attach return type Add attach-return-type to astyle
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761006e0 |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: consistently align pointer with name Run astyle with align-pointer=name
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3d10ef0c |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: correct parenthesis padding Use astyle's unpad-paren to unpad all parentheses that are not included by pad-header, pad-oper, and pad-comma.
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71a2c538 |
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20-Oct-2018 |
Jimmy Brush <code@jimmah.com> |
[libsel4] fix building with LibSel4FunctionAttributes Correct exported functions that were still defined as 'static inline' to use LIBSEL4_INLINE_FUNC so that they can be controlled by LibSel4FunctionAttributes. This is important to other languages that want to bind to the libsel4 static library instead of using the inline C functions.
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937d0423 |
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04-Apr-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
riscv: fix style
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3d994376 |
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02-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
SELFOUR-1264: riscv: Missing brace Adds missing brace in syscalls.h and restyle the code accordingly.
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aafa5942 |
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27-Mar-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
RISCV: Place TODOs in the source
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83ba0847 |
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20-Feb-2018 |
Hesham Almatary <hesham.almatary@unsw.edu.au> |
[SELFOUR-1156] RISC-V Port Experimental release that supports both RV32 and RV64
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