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fe127832 |
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08-May-2020 |
jonas <s9joober@gmail.com> |
Repair barriers in clh_lock_acquire Strengthen the clh_lock_acquire to use release on the atomic_exchange that makes the node public. Otherwise (on ARM & RISCV), the store to the node value which sets its state to CLHState_Pending can become visible some time after the node is visible. In that window of time, the next thread which attempts to acquire the lock will still see the old state (CLHState_Granted) and enters the critical section, leading to a mutual exclusion violation. Signed-off-by: jonas <s9joober@gmail.com>
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8ba22dcd |
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16-Jun-2020 |
jonas <s9joober@gmail.com> |
Repair barriers in sel4_atomic_exchange The implementation of try_arch_atomic_exchange does not correctly pass RELEASE memory ordering (or stronger) to the exchange operation. To acknowledge this, try_arch_atomic_exchange is replaced by a relaxed try_arch_atomic_exchange_rlx which does not apply any memory ordering. Instead, the memory ordering is now added manually by sel4_atomic_exchange. This provides better latency for interrupts as no barriers are evoked inside the loop which performs the relaxed exchange and checks for interrupts. Furthermore, the new manual application of barriers ensures the memory ordering passed to sel4_atomic_exchange. Signed-off-by: jonas <s9joober@gmail.com>
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512a0200 |
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19-Mar-2020 |
Qian Ge <qian.ge@data61.csiro.au> |
replacing all ifndef with pargma once All the kernel header files now use pargma once rather than the ifndef, as the pre-processed C files do not change while header files are protected with pargma once. This will also solve any naming issues caused by ifndef.
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79da0792 |
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01-Mar-2020 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
Convert license tags to SPDX identifiers This commit also converts our own copyright headers to directly use SPDX, but leaves all other copyright header intact, only adding the SPDX ident. As far as possible this commit also merges multiple Data61 copyright statements/headers into one for consistency.
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2d362cb7 |
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11-Nov-2019 |
Kent McLeod <Kent.Mcleod@data61.csiro.au> |
arm,SMP: Refactor irq_t structure for smp Explicitly create a struct definition for irq_t on SMP Arm configurations. This makes it a lot harder to mistakenly use the wrong irq encoding when moving an irq between a cnode index and hardware irq number / core. A couple areas where this was being handled incorrectly was fixed as part of the refactor. When performing an ipi for masking PPI interrupts, the idx encoding is used as it fits into a single word.
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d0930f67 |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: consistently attach return type Add attach-return-type to astyle
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761006e0 |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: consistently align pointer with name Run astyle with align-pointer=name
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3d2ae69f |
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30-Oct-2017 |
Hesham Almatary <heshamelmatary@gmail.com> |
ARM/SMP: Re-implement atomic exchange taking sel4 IPI into account
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4e121d0c |
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30-Oct-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
smp: Use explicit fences instead of volatile This provides a more robust and efficient implementation that only forces memory reloads at explicit known points, instead of the over approximation of every time they are accessed that is forced by volatile.
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ee28936d |
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18-Jun-2017 |
Hesham Almatary <hesham.almatary@data61.csiro.au> |
SMP: Introduce ENABLE_SMP_SUPPORT - Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check
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8f713ab4 |
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16-Mar-2017 |
Hesham Almatary <hesham.almatary@data61.csiro.au> |
SELFOUR-747: SMP/x86: generalize arch-independent IPI code
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40c61e5c |
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18-Jun-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Fix licenses (the rest)
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93cc22b2 |
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09-Mar-2017 |
amrzar <azarrabi@nicta.com.au> |
smp: fix bugs when stalling remote core - Restart TCB from inside the lock if it is waiting for anything other than IRQ - Only replace the TCB with idle thread if it is in ThreadState_RunningVM state Also, this makes the design generic to be shared with arm.
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eccaae51 |
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20-Feb-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
s/D61/DATA61/ in license headers for consistency
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5845659e |
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16-Jan-2017 |
Bamboo <bamboo@keg.ertos.in.nicta.com.au> |
[STYLE_FIX]
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ffc18fe8 |
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15-Jan-2017 |
Hesham Almatary <hesham.almatary@data61.csiro.au> |
SMP: use C++11 __atomic builtins instead of legacy __sync buitins
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af02927b |
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12-Jan-2017 |
Hesham Almatary <hesham.almatary@data61.csiro.au> |
SMP: move lock.h to architecture-independent include/smp s/__sync_lock_test_and_set/__atomic_exchange_n in lock.h
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