History log of /seL4-refos-master/kernel/include/drivers/irq/riscv_plic0.h
Revision Date Author Comments
# ab3d8c44 18-Nov-2020 Curtis Millar <curtis.millar@data61.csiro.au>

riscv: Map devices with large pages on 32 & 64-bit

For 64-bit, this adds a 2nd-level page table for mapping devices using
2MiB frames instead of 1GiB frames.

The boot mapping and hardware header generator have also been fixed to
correctly report the number of large frames needed for devices rather
than only reporting the first. The frame size is also specified
correctly (rather than assuming mapping with 4KiB frames).

This likely fixes an issue whereby only the first 4KiB frame of a device
was reserved but the remaining region of that kernel device could be
mapped at user level.

Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>


# b77c9b20 02-Sep-2020 Jesse Millwood <jesse.millwood@dornerworks.com>

PolarFire SoC: Initial support for platform

Signed-off-by: Jesse Millwood <jesse.millwood@dornerworks.com>


# 721a685a 15-Sep-2020 Jesse Millwood <jesse.millwood@dornerworks.com>

riscv: Use generated number for max irqs

This reduces an area of duplication of defining constant values

Signed-off-by: Jesse Millwood <jesse.millwood@dornerworks.com>


# be2803cb 08-Sep-2020 Jesse Millwood <jesse.millwood@dornerworks.com>

riscv: Renamed PLIC driver

This renames the RISCV PLIC driver file hifive.h to riscv_plic0.h to
better reflect the fact that the driver could be used for a number of
platforms that use the PLIC used by SiFive and SiFive derived platforms.

Signed-off-by: Jesse Millwood <jesse.millwood@dornerworks.com>