riscv: use word_t rather than "unsigned int"

For other platforms, word_t is used for passing length and size
parameters and adapts to 32 and 64-bit platforms appropriately.
The riscv platforms stands out by using "unsigned int" unlike the
others.

Reduce usage of "unsigned int" to match the other 64-bit verification
target platform, x86 64-bit.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>

replacing all ifndef with pargma once

All the kernel header files now use pargma once rather than the ifndef,
as the pre-processed C files do not change while header files
are protected with pargma once. This will also solve any naming issues
caused by ifndef.

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.

SELFOUR-161: Merge Page_Remap with Page_Map

- Remove Remap function from seL4 API for arm, x86, riscv and the
respective invocation implementation.
- Update Map as replacement for Remap
- Update manual

This allows a change of rights if the frame being mapped is already
mapped in at the given vaddr. To map a page to a different address,
unmap it first.

Co-authored-by: Hesham Almatary <hesham.almatary@data61.csiro.au>
Co-authored-by: Anna Lyons <Anna.Lyons@data61.csiro.au>
Co-authored-by: Victor Phan <Victor.Phan@data61.csiro.au>
Co-authored-by: Kent McLeod <Kent.Mcleod@data61.csiro.au>

style: consistently align pointer with name

Run astyle with align-pointer=name

riscv: remove unused function prototype

riscv: remove concept of level in map functions

It is no longer required

riscv: rewrite lookupPTSlot to decode bits

- instead of specifying a level, find the leaf in the page table
- this simplifies a lot of the lookup code

riscv: remove safe mapping entries

This is a concept from ARM that is not required for RISCV, as we are
only mapping one page at a time.

riscv: fix style

riscv: Add missing vspace prototypes

riscv: Prototype and guard Arch_userStackTrace

riscv: Correct prototype for decodeRISCVMMUInvocation

riscv: add missing prototype for remap invocation

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64