riscv: Map devices with large pages on 32 & 64-bit

For 64-bit, this adds a 2nd-level page table for mapping devices using
2MiB frames instead of 1GiB frames.

The boot mapping and hardware header generator have also been fixed to
correctly report the number of large frames needed for devices rather
than only reporting the first. The frame size is also specified
correctly (rather than assuming mapping with 4KiB frames).

This likely fixes an issue whereby only the first 4KiB frame of a device
was reserved but the remaining region of that kernel device could be
mapped at user level.

Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>

tk1-smmu: corrections

Fix tk1 smmu cmake config variables.
Fix platforn_gen for tk1.
Add separate hardware.yml for tk1.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>

SMMU: basic driver for init and probing

Introducing the driver in kernel for detecting SMMU features
and initialise the hardware.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>

PolarFire SoC: Initial support for platform

Signed-off-by: Jesse Millwood <jesse.millwood@dornerworks.com>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.

arm_hyp: Save and restore vtimer state on switches

Added support for reading and writing additional virtual timer
registers for vcpu hw read and write accesses. These include the
compare value register (CNTV_CVAL) and offset register (CNTV_OFF),
each represented as two 32 bit (high and low) registers on aarch32 and
as single 64 bit registers on aarch64.

Added support for explicitly saving and restoring the virtual
timer registers when the vcpu is enabled and disabled. This
ensures when the vcpu is switched in and out, the virtual timer
registers are restored to a state that is consistent to when
it was last run.

By default the CNTVOFF register will be updated by the kernel to
accumulate the time the VCPU is not running. From the guest this will
result in the VCNT register not increasing when the VCPU is suspended.
This behavior can be turned off by disabling the
KernelArmVtimerUpdateVOffset config option.

hardware_gen: add elfloader CPUs output

outputs all CPUs described in the DT to the elfloader
header and also includes any devices in the seL4,elfoader-devices
property.

hardware: expose rpi3 intc region to userspace

the intc region contains a timer that userspace uses on the MCS kernel.

trivial: hardware.yml: clean up indentation

hardware_schema: simplify and clarify schema

The two interrupt-related 'macros' are rather confusingly different.
Explain them, rename them and simplify interrupt specification while
we're at it.

hardware: remove executeNever

this is now implicitly true. MMIO regions should always be executeNever.

hardware: change region logic in hardware yaml

- we're going to switch to mapping the whole address space, excluding
parts used by the kernel, to userspace. We trust the root server anyway,
so giving it extra (possibly invalid) MMIO space just simplifies stuff
on the kernel end.
- drop the hacky true/false/null 'user' flag in favour of a saner
true/false one.
- remove support for 'default' regions. By default we will pass unused
regions through to userspace.

kzm: implement MCS timer driver

- use gpt, so we can have overflow and compare interrupts at the same
time (epit only allows compare)
- set the gpt to use the ipg_highfreq timer, as the standard ipg is too
low and breaks the timer calculations

cortex-a9: tickless global timer driver

- use in sabre (imx6) and zynq7000, the two platforms that were using
the private timer.

hardware_gen: Always specify kernel devices

The kernel device IRQs and Frame mappings generated by this script will
only come from nodes specified in the seL4,kernel-devices property of
the chosen node. Previously these devices were inferred by the script
but this led to false matching and didn't support easily overriding
which devices to match under different configurations or across
different platforms.

Explicitly specifying which devices from the device tree will be used in
the kernel makes it easier to check which devices the kernel is actually
using and makes it easier to change on a per platform or per
configuration basis.

GICv2: map VCPU region as execute never

This matches the other GIC regions.

arm: Rename gic_pl390 to gic_v2

This is to reflect that this driver provides support for features that
are newer than gic_pl390 such as virtualisation.

CMake: Generate device headers from DTS for spike

The DTS compilation was arm platforms only. Moving it to the top level
config file, making it available to RISCV platforms. The generated files
are almost identical with minor differences. A new argument(--arch) is
added to the hardware_gen.py for the differences.

Add Odroid-C2 support

Add support for the Hardkernel Odroid-C2 board.

Co-Authored-By: Anna Lyons <Anna.Lyons@data61.csiro.au>

serial-refactor: Refactor kernel serial drivers

Have added a drivers/serial folder to kernel, where all serial drivers
will be kept. The point is to have the the dts parsed and generate cmake
to include the right uart.c file prefixed with the compatibility.
Have removed all io.c from plat and includes from plat/config.cmake and
updated CHANGES file.

hardware_gen: Add GICv3 support.

hardware_gen: generate kernel_devices

This change fixes support for instances where we have
multiple kernel devices in the same page, or kernel devices
which aren't at page-aligned addresses.

Also use seL4_UserTop to pick the right address to start
putting the kernel device pages.

hardware_gen: use "ranges" property for cpu-addressable buses

This removes the need for the buses array in the hardware YAML

hardware_gen: pull interrupts from DTS

This adds support for extracting interrupt numbers from DTS
to the hardware header file generator, so that the majority
of the per-platform interrupt listings can be removed.

arm: generate memory region tables from dts

This change adds infrastructure to automatically generate the
physBase macro, the avail_p_regs array, and the dev_p_regs array
based on a device tree. Platforms can opt-in to using this
by adding DTS files to the KernelDTSList variable.

The Python script uses the hardware.yml file to determine which
devices in the device tree are of interest to the kernel and should
be hidden from userspace and instead mapped into the kernel. Note that
currently the kernel mappings are not (yet) generated, however most
of the infrastructure needed to make that happen is present.