riscv: Map devices with large pages on 32 & 64-bit

For 64-bit, this adds a 2nd-level page table for mapping devices using
2MiB frames instead of 1GiB frames.

The boot mapping and hardware header generator have also been fixed to
correctly report the number of large frames needed for devices rather
than only reporting the first. The frame size is also specified
correctly (rather than assuming mapping with 4KiB frames).

This likely fixes an issue whereby only the first 4KiB frame of a device
was reserved but the remaining region of that kernel device could be
mapped at user level.

Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>

riscv: Delete unused function

Signed-off-by: Stefan O'Rear <sorear@fastmail.com>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.

Document internal machine/interrupt.h interface

Every platform has to implement a standard set of interrupt interfaces
that the kernel uses to interract with a machine's interrupt controller.
Providing a single header file for each of these functions provides a
single location to document their behavior.

rename KDEV_PPTR/PPTR_KDEV to KDEV_BASE

This is the virtual address for the start of the kernel device mapping
region.

Create device untypeds at boot for all arches

Currently on x86 device untypeds are generated by passing the entire
address space minus any parts that are reserved by the kernel or that
are "real" memory (e.g. kernel image, physical RAM).

On ARM and RISC-V, device untypeds were generated at compile-time from
a device tree. This patch moves ARM and RISC-V to use the same approach
as x86, and moves the code from x86 into a common location that's
shared between the three architectures.

Co-Authored-By: Anna Lyons <anna@gh.st>

riscv: Remove IPI functions when SMP is off

Remove ipi_get_irq() and ipi_clear_irq() when SMP is not enabled.

trivial: Fix compile error when debug is off

riscv: Add IPI support and SMPify IRQ-related code

Add IPI support and SMPify IRQ-related code.

riscv: Print SIP for spurious interrupts

Add a bit more information for spurious interrupts.

riscv: Split IRQ init to platform and local

Split IRQ init code to platform-code and per-hart code.

mcs: Remove timer init and reset from RISC-V

The timer init and reset are not needed to initialise the clock for MCS
in RISC-V.

riscv: Relocate read time to header

Move the RISCV function to read the current time to the header file so
that it can be inlined for MCS.

RISCV: Add Hifive unleashed platform

This change adds support for Hifive unleashed board. It also removes the
outdated hifive suport from the spike platform.

CMake: Generate device headers from DTS for spike

The DTS compilation was arm platforms only. Moving it to the top level
config file, making it available to RISCV platforms. The generated files
are almost identical with minor differences. A new argument(--arch) is
added to the hardware_gen.py for the differences.

Consistent naming of FaultIP and NextIP in kernel

Always refer to the virtual register that stores the address of a fault
as FaultIP and the register that stores the return for a fault NextIP.

style: consistently attach return type

Add attach-return-type to astyle

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64