Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.

Move vcpu_switch into Arch_switchToThread

Currently the vcpu_switch function is called in the setVMRoot function
after possible early returns. In order to make sure the vcpu is
always switched, the call is moved into Arch_switchToThread before the
call to setVMRoot.

RFC-3: Update user context for ARM with thread IDs

Switched appropriate naming conventions.
Was using the aarch64, have switched to aarch64 names.

TIPDRURW -> tpidr_el0
TPIDRURO -> tpidrro_el0
TPIDRPRW -> tpidr_el1

Switch TLS register on aarch32 from TPIDURO (tpidrro_el0) to tpidr_ro so
that it can be written to from user-land.

Thread ID registers tpidr_el0 have been added to the user context for
aarch32 and aarch64.

Only the thread ID that is writeable from EL0 is saved in the TCB and
saved/restored on context switch.

Thread IDs that are only changed within a VM (the read-only thread ID
for exception level 0 and the thread ID for exception level 1) are
stored in the VCPU and saved and stored as part of VM enable/disable.

Thread IDs that are only changed with VMs have been separated out into
hypervisor code.

Replace IPC_BUF_GLOBALS_FRAME with KERNEL_GLOBALS_FRAME

The globals frame no longer serves its original purpose of informing a
thread of its IPC buffer address, and instead as a virtual
implementation of thread ID registers.

Consistent naming of FaultIP and NextIP in kernel

Always refer to the virtual register that stores the address of a fault
as FaultIP and the register that stores the return for a fault NextIP.

style: consistently attach return type

Add attach-return-type to astyle

arm: Provide TLS_BASE virtual register

This commit provides a universal TLS_BASE virtual register on ARM, similar to as exists
on x86. Depending on the precise configuration this virtual register maps to a different
register
* aarch64: TPIDRURW is used for the TLS_BASE and is already declared and being saved
and restored on context switches, so this just adds TLS_BASE as an alias of it
* armv6: Has no hardware register for use for a TLS_BASE, and so the virtual register
gets stored into the globals frame
* armv7+: TPIDURO is used for TLS_BASE and so the restore paths are modified to load
TLS_BASE into it

arm: remove assumption that CONFIG_IPC_BUF_* must be set

Previously arm code assumed that either CONFIG_IPC_BUF_TPIDRURW or
CONFIG_IPC_BUF_GLOBALS_FRAME needed to be set. Given that neither of
these options are required for aarch64, remove this assumption and only
guard code with #ifdefs are required.

Share linker.h between architectures

Verification: Run idle thread with global PD all the time

SMP: Introduce ENABLE_SMP_SUPPORT

- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check

aarch32: Force the idle thread to run on kernel page table

arm-hyp: Disable active VCPU when switching to the idle thread

`vcpu_switch` is used in `setVMRoot` to switch the active VCPU, or to enable/disable
certain virtualization if going to/from using a VCPU. When running the idle thread
we do not leave kernel mode and having a VCPU active or not is almost irrelevant,
except that interrupts are enabled and the VGIC can generate interrupts. Whilst the
VGIC should not generate an interrupt whilst the idle thread is running, this is
problematic for verification

SELFOUR-553: Support alternate IPC buffer locations without globals frame

This commit adds support for using the ThreadID registers of the ARM MPCore
platforms for storing the address of the IPC buffer instead of the globals
frame. The choice of using the user readable/writeable ThreadID register
is chosen, even though it means the user cannot use it for its own
purposes, as it leaves room in the future for doing TLS support in the
user read only register, where compilers expect it.

Remove incorrect CONST usage

This removes usages of CONST Arch_activateIdleThread. According to
gcc 'a function that has pointer arguments and examines the data
pointed to must not be declared const'. Whilst these functions do
not presently examine their tcb_t pointer argument, it seems
pointless to pass something that can never be safely looked at.

Further a function that returns void and is CONST is utterly meaningless

arm: Restore CPSR_IDLETHREAD usage

CPSR_IDLETHREAD was introduced in a5f61c7 to mask FIQs and asynchronous
aborts. Usage of this was lost in a merge, this commit restores the
usages in Arch_configureIdleThread, and updates CPSR_IDLETHREAD to
use the correct PMODE depending on whether the kernel is running
in hypervisor mode or not

Rearranging sources for aarch32 to 32/*