Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.

SELFOUR-161: Merge Page_Remap with Page_Map

- Remove Remap function from seL4 API for arm, x86, riscv and the
respective invocation implementation.
- Update Map as replacement for Remap
- Update manual

This allows a change of rights if the frame being mapped is already
mapped in at the given vaddr. To map a page to a different address,
unmap it first.

Co-authored-by: Hesham Almatary <hesham.almatary@data61.csiro.au>
Co-authored-by: Anna Lyons <Anna.Lyons@data61.csiro.au>
Co-authored-by: Victor Phan <Victor.Phan@data61.csiro.au>
Co-authored-by: Kent McLeod <Kent.Mcleod@data61.csiro.au>

Fix RISC-V registers to reflect calling convention

Add RISC-V IRQ invocations

We add support for seL4_IRQControlGet and seL4_IRQControlGetTrigger. If
a platform doesn't support setting the trigger, then
seL4_IRQControlGetTrigger will return an error. If the platform doesn't
have a PLIC driver, then it won't have any IRQs that can be requested.

Also authored by: Siwei Zhuang <siwei.zhuang@data61.csiro.au>

riscv: add remaining registers to user context.

The registers a7, s2-11, and t3-6 were missing from seL4_UserContext.
We also add these to frameRegisters and gpRegisters, which are used
to implement the TCB invocations for reading and writing these
registers.

Zero-length arrays aren't valid expressions or types in ISO C, so
to keep the c parser happy we need to either remove gpRegisters or
provide some contents for it.

In the past, frameRegisters and gpRegisters distinguished between
those registers preserved across a syscall and those that weren't.
TCB_CopyRegisters allows the caller to choose which set to copy.

Since we preserve all non-return registers, this distinction isn't
relevant anymore and there's no easy way to justify the members of
frameRegisters and gpRegisters.

We arbitrarily choose to put the 'last' register t6 in gpRegisters,
for consistency with the register list in registerset.h and with the
order that registers are restored.

manual: clarify VSpace as top-level paging structure

This change updates the vspace chapter to separate the high-level concept of a VSpace from the
architectually defined objects. It also updates the various names for the vspace parameter to all be
vspace.

manual: update Page map documentation

- remove PD, PT references
- make clear that the middle level structures need mapping or an error is returned

manual: remove hard-coded PD, PT and Page invocations

- increases the maintainability of the docs
- move descriptions of methods to the API reference
- remove hardcoded invocations in manual

This commit removes the content completely from vspace.tex, as it is out of date and needs
restructuring. The next commit does the restructuring.

manual: remove hard-coded ASID invocations

- move documentation to API ref
- create tables pointing to the API ref for these objects

manual: Added <docref> XML Tag to Doxygen

Introduced a new Doxygen XML tag '<docref>'. The intention of
this tag is to indicate a section of text in the Doxygen XML that
will contain a reference to another section in the Manual e.g.
"See \autoref<sec:x>". As other generation formats aren't aware of
other chapters/sections in the manual, the <docref> encapsulation
allows it to omit the text from the output. The Latex generator
has been modified to continue parsing the 'docref' contents.

trivial: fix whitespace

riscv: document API methods

riscv: make sel4arch.xml follow dtd

riscv: s/x3/gp and s/x4/tp in seL4_UserContext

This makes seL4_UserContext consistent with frameRegisters

SELFOUR-1277: implement PageRemap for riscv

riscv: kill tabs in sel4arch.xml

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64