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512a0200 |
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19-Mar-2020 |
Qian Ge <qian.ge@data61.csiro.au> |
replacing all ifndef with pargma once All the kernel header files now use pargma once rather than the ifndef, as the pre-processed C files do not change while header files are protected with pargma once. This will also solve any naming issues caused by ifndef.
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79da0792 |
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01-Mar-2020 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
Convert license tags to SPDX identifiers This commit also converts our own copyright headers to directly use SPDX, but leaves all other copyright header intact, only adding the SPDX ident. As far as possible this commit also merges multiple Data61 copyright statements/headers into one for consistency.
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d0930f67 |
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18-Mar-2019 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
style: consistently attach return type Add attach-return-type to astyle
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b942a504 |
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26-Mar-2018 |
Bruce Mitchener <bruce.mitchener@gmail.com> |
Fix trivial comment typos.
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40c61e5c |
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18-Jun-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Fix licenses (the rest)
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3f90fad6 |
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21-Mar-2017 |
Kofi Doku Atuah <kofidoku.atuah@data61.csiro.au> |
SELFOUR-836: Hardware debug API functions should take tcb_t and not arch_tcb_t Touches files all throughout x86 (32 and 64) and ARM.
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eccaae51 |
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20-Feb-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
s/D61/DATA61/ in license headers for consistency
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cca128ea |
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04-Jan-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
ia32: Always use IRET instead of sysexit when single stepping Previous code to return to user level performed popf sysexit The popf was just before the sysexit as there is a one instruction delay on the trap flag taking effect and ensured we did not attempt to single step the kernel. Unfortunately there is not a one instruction delay on enabling the interrupt flag, and as a result an interrupt can be taken prior to executing the sysexit instruction. It is possible to exploit this to escalate a user level thread such that it is running with CPL0 This commit changes the restore paths to perform sti sysexit Which will correctly delay interrupts until the completion of sysexit. As the popf is now being done earlier to prevent single stepping the kernel we return via an iret, instead of sysexit, for threads that have single stepping enabled. To achieve this we * When loading debug state if we enable the Trap flag we also manipulate the register state such that the iret return path will be picked * As fastpath_restore does not have an iret return path we forbid the fastpath from switching to threads that have single stepping enabled
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b90238d0 |
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19-Oct-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
Replace #pragma once with include guards
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d1d45681 |
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11-Oct-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Define FLAGS bits instead of having magic numbers
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6294225c |
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10-Oct-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Rename [ER]FLAGS to FLAGS Having a different name for the FLAGS register creates an unnecessary difference between ia32 and x86_64 code since regardless of the name/size the bits in the register mean exactly the same thing
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bebfcf6d |
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23-Jun-2016 |
Kofi Doku Atuah <kofi.dokuatuah@nicta.com.au> |
SELFOUR-499: X86, ARM: Add userspace invocations for hardware debugging This commit implements the body of SELFOUR-499. The API exposes the x86 DR0-7 and ARM coprocessor 14 features to userspace by virtualizing them as context- switched registers in the TCB. Implemented as TCB invocations. This feature is only built when CONFIG_HARDWARE_DEBUG_API is selected. * Add low-level support routines for setting, unsetting, getting, enabling and disabling breakpoints. * Add support for single-stepping as well. ^ Single-stepping is not supported on ARMv6 since the hardware doesn't have support. ^ ARM implements single-stepping as instruction breakpoints configured to fault on every instruction -- this is achieved through the "mismatch" mode, which is only supported from ARMv7 onwards. * Also support explicit software break requests, a la "BKPT" and "INT $3". * New invocations: * seL4_TCB_SetBreakpoint(). * seL4_TCB_GetBreakpoint(). * seL4_TCB_UnsetBreakpoint(). * seL4_TCB_ConfigureSingleStepping(). * New constants: ^ Event types: ^ seL4_InstructionBreakpoint. ^ seL4_DataBreakpoint. ^ seL4_SoftwareBreakRequest. ^ Access types: ^ seL4_BreakOnRead. ^ seL4_BreakOnWrite. ^ seL4_BreakOnReadWrite. ^ Exports: ^ seL4_NumHWBreakpoints. ^ seL4_NumExclusiveBreakpoints. ^ seL4_NumExclusiveWatchpoints. ^ seL4_NumDualFunctionMonitors. ^ seL4_FirstBreakpoint. ^ seL4_FirstWatchpoint. ^ seL4_FirstDualFunctionMonitor. See documentation in the seL4 API manual.
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