replacing all ifndef with pargma once

All the kernel header files now use pargma once rather than the ifndef,
as the pre-processed C files do not change while header files
are protected with pargma once. This will also solve any naming issues
caused by ifndef.

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.

RFC-3: Update context for x86 to use FS and GS.

TLS_BASE virtual register is replaced with FS_BASE and GS_BASE virtual
registers.

The FS_BASE and GS_BASE virtual registers are moved to the end of the
context so they need not be considered in the kernel exit and entry
implementation.

Removed tracking of ES, DS, FS, and GS segment selectors on kernel entry
and exit.

ES and DS are clobbered on kernel entry with the RPL 3 selector for a
DPL 3 linear data segment.

FS is clobbered on exit with the RPL 3 selector for the DPL 3 segment
with FS_BASE as the base. This is done on exit to reload the value from
the GDT.

GS is clobbered on exit with the RPL 3 selector for the DPL 3 segment
with GS_BASE as the base. This is done on exit to reload the value from
the GDT.

Kernel entry and exit code is refactored, simplified, and improved in
light of the above changes.

x64: update verified config to use fsgsbase instr

The verification platform for x64 relies on the fsgsbase instruction.

style: consistently align pointer with name

Run astyle with align-pointer=name

style: correct parenthesis padding

Use astyle's unpad-paren to unpad all parentheses that are not included
by pad-header, pad-oper, and pad-comma.

x86: Define per node arch global state

Global state in this context is state/datastructures that need to be available at all times,
both in user and kernel mode, by the hardware for correct operation. The purpose of creating
a separate per-node structure for it is so that there is the option of treating it specially
in the future from other per node state

x64: implement seL4_BenchmarkFlushCaches

by moving the ia32 implementation up a level to x86
and implementing the syscall stub.

[STYLE_FIX]

x86: Implement safe rdmsr function

Implements a safe version of `x86_rdmsr` that can return success or failure depending
on if the rdmsr caused a GP fault

ia32: Add getCurrentCR3

This unifies the interface provided by ia32 and x86-64. This interface
is neccessary as it is not always sufficient to talk about the current
PD (or vspace root), as CR3 can contain more than just the root.

x86: Avoid writing the fs/gs base if we don't have to

x86: Add FORCE_INLINE to some fastpath functions

The compiler fails to realize that inlining these functions is
a performance benefit due to fact that after inlining their
bodies can be optimized with other inlined functions.

x86: Split CPU ID management into mode and general

This moves getCurrentCPUIndex into a mode specific smp header, and
moves wrappers that use it into the generap smp header

SELFOUR-634: support for TLB and cache management

Change ia32 to use fs register for IPC buffer

gs register is used by gcc for TLS and the IPC buffer gets in the way

add seL4_BenchmarkFlushCaches() for arm and ia32

Available when CONFIG_ENABLE_BENCHMARKS is set, flushes caches for
running cold-cache benchmarks

SELFOUR-632: implement cores non-architecture dependent structres

x86: Generic setCurrentVSpaceRoot

Defines a generic setCurrentVSpaceRoot to replace setCurrentPD in
mode generic code

x86: Support for syscall

syscall/sysret is an additional way of performing kernel entry/exits.
Whilst the instructions themselves are not supported when running
in 32-bit mode, this commit provides the config choice for them as
well as the generic support code for them.

x86: Rename invalidateTLBentry->invalidateTLBEntry

SELFOUR-630:preliminary booting application processors
- update core detection code and Kconfig file
- update kernel stack managment so that BSP does not use boot stack before IPI APs
- move arch dependant data to a single structure
- add cache line size to Kconfig
- add cpu indexing and apic id mapping
- boot APs to halting state
- add guard for kernel stack if there is only one core

Revert "Merge pull request #358 in SEL4/sel4 from ~AZARRABI/sel4:multicore to master"

This reverts commit ce2f666bb811c5e4c779829fcb09d5a189ebcdbb, reversing
changes made to dc183f96b81f2344d7d0d910fc430f924eaae940.

SELFOUR-630:preliminary booting application processors
- update core detection code and Kconfig file
- update kernel stack managment so that BSP does not use boot stack before IPI APs
- move arch dependant data to a single structure
- add cache line size to Kconfig
- add cpu indexing and apic id mapping
- boot APs to halting state
- add guard for kernel stack if there is only one core

x86: Improve translation invalidation

x86_64 (with PCIDs enabled) supports a more fine grained invalidation
approach for the TLB and Page Structure Cache. This change expands
the number and kinds of information passed for certain invalidations,
and provides an implementation of this for ia32.

x86: FS/GS base MSRs

when FS/GS_BASE_MSR are used to set the base addreses,
user applications should not touch FS/GS regiters; so
the kernel should load proper selectors once, establishing
limits and other attributes for the segments.

x86: Move getFaultAddr to general hardware.h, as the read_cr2 is already specialized by the machine mode

ia32: Add includes that are now needed after other includes got reordered

x86: Move general x86 functions to common header

x86: Rename constants and functions to have X86 prefix instead of IA32 prefix

x86: Make parts of what have become 32-bit specific headers common

The reason these were not made common to begin with is so that there
was a commit that was just a rename of these files to make any merges
with other branches that might exist easier

x86: Minimal changes to fix previous commit that renamed headers