Inline resetTimer for all platforms

- for arm generic timer platforms, we remove resetTimer ->
resetGenericTimer indirection and simply include generic_timer.h
- this reduces boiler plate for platforms that share timer drivers, as
they simply include the one header
- there is far more timer code in the RT kernel, which motivates this
change

Move arm generic timer to own header

Only platforms that use it should include the code

Combine common arm generic timer code

Previously both aarch32 and aarch64 duplicated common
generic timer code. Unify them in include/arch/arm/machine/timer.h

Added 32-bit support for the zynqmp.

The Zynq UltraScale+ MPSoC (PLAT zynqmp) is a Multi-Processor SOC
made by Xilinx that has a quad-core Cortex-A53, a dual-core Cortex-R5
and an FPGA.

This adds 32-bit, single-core support on the the Cortex-A53 cluster.