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cddc4e6e |
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15-Nov-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Inline resetTimer for all platforms - for arm generic timer platforms, we remove resetTimer -> resetGenericTimer indirection and simply include generic_timer.h - this reduces boiler plate for platforms that share timer drivers, as they simply include the one header - there is far more timer code in the RT kernel, which motivates this change
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57fa0e0f |
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07-Aug-2017 |
Hesham Almatary <hesham.almatary@data61.csiro.au> |
Share linker.h between architectures
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b1f8078f |
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02-Feb-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
x86: Add early break in `tsc_init` Once we have found a matching model there is no point in trying to find another one
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b1df530d |
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02-Feb-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
SELFOUR-773: x86: Use rdmsr safe for X86_PLATFORM_INFO_MSR In some environments (such as KVM) this MSR is not emulated correctly and accessing it causes a GP fault. Therefore we catch the GP fault and using this to determine whether the MSR actually exists or not
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7caa3d19 |
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12-Dec-2016 |
Bamboo <bamboo@keg.ertos.in.nicta.com.au> |
[STYLE_FIX]
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6cd48520 |
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11-Dec-2016 |
Donny Yang <work@kota.moe> |
x86: Add Skylake-related info
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023cbfdc |
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11-Dec-2016 |
Donny Yang <work@kota.moe> |
x86: Add support for more architectures in reading the TSC frequency
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cc685301 |
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23-Nov-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
Remove unneeded usages of `VISIBLE` Using `VISIBLE` where it is not needed limits the ability for the compiler to optimize, especially when using whole program optimizations
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bd72c0c0 |
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13-Nov-2016 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
pc99: Ignore bogus TSC frequencies
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abf3ff6d |
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14-Nov-2016 |
Stephen Sherratt <Stephen.Sherratt@data61.csiro.au> |
Repeatedly retry tsc freq measurement This attempts to handle the case where while running in a simulator, seL4 occasionally fails to measure the TSC frequency due to too many TSC ticks per PIT wrap around.
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846254be |
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07-Nov-2016 |
Bamboo <bamboo@keg.ertos.in.nicta.com.au> |
[STYLE_FIX]
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c86669df |
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31-Oct-2016 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
x86: export tsc freq in bootinfo We read the frequency from the platform info MSR and export it to the user for accurate timing (for platforms that support platform into)
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d507b2d3 |
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09-Feb-2016 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
SELFOUR-421 Introduce explicit device frames and untypeds Kernel objects cannot be created from device untypeds, with the exception of frames, which do not get zeroed and cannot be used as an IPC buffer. Device untypeds additionally cannot be used in the construction of ASID pools. This then changes the API to the rootserver (i.e. bootinfo) to send device untypeds instead of device frames. On ARM these device untypeds are the same as the previously exported device frame regions. On x86 PCI scanning is removed and all physical memory addresses (that are not important for kernel integrity) are released to the user. In order to have bits in the frame and untyped caps on ARM the number of software ASIDs had to be reduced from 2^18 to 2^17, and the maximum untyped size reduced from 2^31 to 2^30
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ce2c058f |
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06-Aug-2016 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
SELFOUR-607: inline remaining irq path functions
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9a7b1aec |
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06-Jun-2016 |
Anna Lyons <Anna.Lyons@nicta.com.au> |
Trivial: move printfs in handleReservedIRQ up. This wraps the printfs in CONFIG_IRQ_REPORTING and reduces redundancy.
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bddd804a |
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06-Jan-2016 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: IOAPIC/MSI syscalls Restructure the x86 interrupt handling to allow for a more flexible method of using IOAPIC and MSI interrupts. The essence of this change is to allow for the user to pick, for both IOAPIC and MSIs, which CPU vector to use. Additionally there is future support, in the API, for seL4 to eventually protect MSI interrupts with the vt-d interrupt routing tables. API behaviour for legacy systems using the PIC is preserved Part of SELFOUR-281
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c6139ce4 |
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01-Jul-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Rename ia32KScurInterrupt -> x86KScurInterrupt
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8e15c429 |
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03-Nov-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Port some of the IOMMU changes on the experimental branch This changes the IOMMU from using passthrough devices and instead directly mapping in the reserved regions that are needed for each device.
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646638ef |
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09-Nov-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Do not conditionally compile IOMMU code, use build/run time checks Guarding code with #ifdef's makes even cursor testing of 'does this code compile' difficult due to code being hidden by the pre-processor. Using config_set in regular C if statements is performant as the compiler can trivially detect dead code at compile time, and at -O1 and above will not even link in symbols referenced by dead code in these blocks, so this will not bloat image size
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5d42d014 |
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09-Nov-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Do not conditionally compile IRQ controller code, use build/run time checks Guarding code with #ifdef's makes even cursor testing of 'does this code compile' difficult due to code being hidden by the pre-processor. Using config_set in regular C if statements is performant as the compiler can trivially detect dead code at compile time, and at -O1 and above will not even link in symbols referenced by dead code in these blocks, so this will not bloat image size
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71a45e6b |
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05-Nov-2015 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
x86: Strip multi kernel support from the x86 kernel. This is not used and is conflicting with planned future features
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c0e9c638 |
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11-Aug-2014 |
Adrian Danis <Adrian.Danis@nicta.com.au> |
Support IOAPIC on ia32 and modify interrupt handling to support user level setting of modes
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91b7da86 |
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17-Jul-2014 |
TrusthworthySystems <gatekeeper@sel4.systems> |
Release snapshot
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