Retire boot_ctzl.

This was a workaround for a problem that was properly fixed in
f8606c86 however the boot_ctzl version somehow persisted.

Remove irrelavant changes from riscv commit to non riscv arch code

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64

Assign correct affinity to idle thread

Avoid repeatedly appending idle threads to debug list

Each node calls `init_core_state` and so can be relied upon to append their own idle
thread. Having every core enqueue all the cores idle threads is not correct as it will
result in attempting to enqueue a thread more than once.

Share linker.h between architectures

SMP: Introduce ENABLE_SMP_SUPPORT

- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check

Call Arch_setTCBIPCBuffer from kernel/boot.c

SELFOUR-880: add seL4_DebugDumpScheduler

- when CONFIG_DEBUG is enabled, track all threads
- when CONFIG_PRINTING is enabled, provide seL4_DebugDumpScheduler which
allows the user to dump the state of the kernel scheduler.

SELFOUR-880: name the idle thread

SELFOUR-864: Fix alignment calculation

refactor: initialise common core state in one place

Remove assumption on 32-bit memory offsets

On 64-bit platforms physical address could be >2^32 offset from a virtual address. This
changes offsets to match the word size of the target architecture

Provide spec for CTZL

Provides a spec for the __builtin_ctzl function and changes existing
code to use this wrapper

[STYLE_FIX]

Helper for allocating the extra boot info region

Extend bootinfo to support potentially arbitrary additional structures

This provides a future proof interface for extending the bootinfo region with additional
kinds of optional architecture and platform specific information. The basic idea is to
report the size of a region directly following the bootinfo frame, which is made up of
a series of 'chunks'. Each chunk has an identifier (describing what it is) and a length,
allowing unknown chunks to be skipped in favor of examining the remaining of the chunks.

Use same constant for clearing and allocating bootinfo frame

Closes #56

Remove many DONT_TRANSLATE markers.

The vast majority of the DONT_TRANSLATE markers in the kernel are used
to hide __asm__ statements and builtin functions
(e.g. __builtin_unreachable ()) from the C-to-Isabelle parser.

The parser now supports underscore identifiers and many __asm__ statements,
and the builtin functions are prototyped, meaning the vast majority of the
DONT_TRANSLATE markers can be dropped. The remaining markers cover functions
that must be treated specially.

[STYLE_FIX]

SELFOUR-553: Support alternate IPC buffer locations without globals frame

This commit adds support for using the ThreadID registers of the ARM MPCore
platforms for storing the address of the IPC buffer instead of the globals
frame. The choice of using the user readable/writeable ThreadID register
is chosen, even though it means the user cannot use it for its own
purposes, as it leaves room in the future for doing TLS support in the
user read only register, where compilers expect it.

SELFOUR-222: Configure IRQ cnode size per platform

SELFOUR-444: Preemptible zeroing for retype.

Change to the order of operations and timing behaviour of
invokeUntyped_Retype. The Retype operation now zeroes the
entire range of the Untyped cap (if it is being used for
the first time) before installing any objects. This avoids
the need for long-running initialisation of large objects,
whose initial contents are always zero. The initial zeroing
phase is preemptible, and may take multiple timeslices to
complete.

add basic api for setting affinity

Update SMP idle thread handling

Defined untyped size ranges in libsel4

SELFOUR-632: implement cores non-architecture dependent structres

SELFOUR-276: Add MCP field to threads.

Where MCP = Maximum Controlled Priority

This commit adds:

* seL4_TCB_SetMCPriority

and changes the arguments to

* seL4_TCB_Configure

As of this commit, a thread cannot create or set a threads
priority (including itself) above its mcp. Previously the kernel
did this check against a threads priority, which prevented a thread
from setting it's own priority down and then up again.

SELFOUR-421: Add padding for untyped in bootinfo

SELFOUR-421 Introduce explicit device frames and untypeds

Kernel objects cannot be created from device untypeds, with the
exception of frames, which do not get zeroed and cannot be used
as an IPC buffer. Device untypeds additionally cannot be used
in the construction of ASID pools.

This then changes the API to the rootserver (i.e. bootinfo) to
send device untypeds instead of device frames. On ARM these
device untypeds are the same as the previously exported device
frame regions. On x86 PCI scanning is removed and all physical
memory addresses (that are not important for kernel integrity)
are released to the user.

In order to have bits in the frame and untyped caps on ARM the
number of software ASIDs had to be reduced from 2^18 to 2^17,
and the maximum untyped size reduced from 2^31 to 2^30

SELFOUR-566: Decouble seL4_DebugNameThread from CONFIG_PRINTING

Correct separation of printing and debug builds

Fixes some build issues with 541289a32603cee8242b5360b05e8f0c52795433
as well as further allowing debugging (via the capdl interface) to
happen when printing is turned off.

SELFOUR-114: remove bootinfo.h duplication

SELFOUR-399: object sizes and globals frame addr should come from the same source

Do not switch to the the root thread until after cpu initialization is done

Remove `boot_clzl`.

This function seemed to exist for the sole reason of being able to mark the CLZ
operation as DONT_TRANSLATE. This is no longer necessary as the underlying
`clzl` function is now marked DONT_TRANSLATE.

Fix missing include.

This file uses macros like `CLZL` that are defined in util.h.

x86: Define a KERNEL_BASE_OFFSET for translating the kernel image region

This definition is different to BASE_OFFSET in that it is only meant to
apply to the kernel image portion of the kernel window, and doesn't
assume that the entire window can be translated by a single offset

unsigned int -> word_t

Rename uint32_t -> word_t in any relevant places

Rename CTZ and CLZ functions to long variants, change parameters from uint32_t to word_t to make compatible between 32 and 64-bit

Use wordBits instead of constant 32

refactor tcb_t to remove duplication between x86 and arm header files

Add ability to set a human readable thread name when running kernel in debug mode

ARM: Map the initial thread's IPC buffer and boot info as non-executable.

Note that this also required some irrelevant x86 changes to match function
arguments.

ia32: Large commit that implements PAE paging for x86

This commit involves the PAE paging itself, refactoring the
vspace code to extra what is common between PAE and 32bit paging,
as well as some renaming to not call the root paging structure
a PD

trivial: Standardise on 32-bit unsigned variables for domain values.

Domains are unnecessarily treated explicitly as 8-bit values within boot info.
Though there are existing proof constraints that limit the maximum domain value
to 8 bits, most of the code would permit domain values up to 32 bits. The
maximum value is unnecessarily constrained in boot info, a restriction which
this commit removes.

Closes VER-341

Derive a new IPC buffer cap when inserting into the initial threads TCB to remove mapping information

For any other thread setting the IPC buffer via TCB_Configure will result
in a derived capability being installed that does not have mapping information.
This leads to a expected behaviour that setting a new IPC buffer (even if it is
the same as the current one), will not perform an unmapping.

Release snapshot