History log of /seL4-l4v-10.1.1/seL4/src/arch/x86/machine/capdl.c
Revision Date Author Comments
# 8bd43ab7 12-Sep-2017 Bamboo <bamboo@keg.ertos.in.nicta.com.au>

[STYLE_FIX]


# 128829a9 11-Sep-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Rationalize names of paging structures

Changes the name of paging structure entries to more clearly indicate the kind of object
they map to. Generally this is changing a `pde_small` to `pde_pt` to indicate that this
mapping refers to a page table, removing an inconsistency where `pde_large` indicated that
the mapping was for a large page. For the same reason the `ept_pde_4k` type is changed to
`ept_pde_pt` type to reflect what is present in the actual entry.

`pde_large` is left as 'large' and not explicitly given a size as code common between
ia32 and x86-64 manipulates these entities and 'large' is already a used abstraction
over the two potential page sizes so there is need to introduce a formal abstraction layer
and make the names in the structures more specific.


# a9e1f517 21-Aug-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

SELFOUR-1062: Hide all IOMMU related code behind #ifdef guards

The IOMMU implementation is not going to be verified at the moment, and so the code for
it needs to be hidden from verification, which we do by #ifdef'ing it out if the IOMMU
is not enabled. As a result the IOMMU configuration depends on a non verification target


# 77616ac4 04-Apr-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

Check for CONFIG_ variables being 'defined' instead of 'true'

This is to conform with existing style of checking configuration options


# f653dfaa 16-Jan-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Support 52-bit physical addresses in IOMMU when in 64-bit mode

Defines the vtd structures to be their full 52-bit size when in 64-bit mode by
making the hardware.bf per mode in the pc99 platform.

Updates some variables in iospace.c that were hard defined to be 32-bit


# 3f9eb7c8 06-Oct-2016 amrzar <azarrabi@nicta.com.au>

SELFOUR-632: implement cores non-architecture dependent structres


# d507b2d3 09-Feb-2016 Adrian Danis <Adrian.Danis@nicta.com.au>

SELFOUR-421 Introduce explicit device frames and untypeds

Kernel objects cannot be created from device untypeds, with the
exception of frames, which do not get zeroed and cannot be used
as an IPC buffer. Device untypeds additionally cannot be used
in the construction of ASID pools.

This then changes the API to the rootserver (i.e. bootinfo) to
send device untypeds instead of device frames. On ARM these
device untypeds are the same as the previously exported device
frame regions. On x86 PCI scanning is removed and all physical
memory addresses (that are not important for kernel integrity)
are released to the user.

In order to have bits in the frame and untyped caps on ARM the
number of software ASIDs had to be reduced from 2^18 to 2^17,
and the maximum untyped size reduced from 2^31 to 2^30


# 35c50cfd 29-Aug-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

SELFOUR-556: Rationalize BITS vs INDEX_BITS

s/PD_BITS/PD_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices


# f251953f 29-Aug-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

SELFOUR-556: Rationalize BITS vs INDEX_BITS

s/PT_BITS/PT_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices


# 1103e5a3 28-Aug-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

SELFOUR-556: Rationalize BITS vs INDEX_BITS

s/ASID_POOL_BITS/ASID_POOL_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices


# bbc98573 28-Aug-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

SELFOUR-556: Rationalize BITS vs INDEX_BITS

s/VTD_PT_BITS/VTD_PT_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices


# 49510f9d 22-Aug-2016 Anna Lyons <Anna.Lyons@data61.csiro.au>

SELFOUR-624: remove redundancy in io.[c|h]

And clean up a bit while we are there


# 716c2838 12-May-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Correct compile error with -O3


# d20ca20a 13-Jan-2016 Adrian Danis <Adrian.Danis@nicta.com.au>

x86: Rename ia32->x86

This is a stylistic commit to make names of variables/constants and
functions in the kernel more consistent. That is, things that are
not IA32 specific, but are generic x86, get renamed to having an
x86 name


# 646638ef 09-Nov-2015 Adrian Danis <Adrian.Danis@nicta.com.au>

x86: Do not conditionally compile IOMMU code, use build/run time checks

Guarding code with #ifdef's makes even cursor testing of 'does this code compile'
difficult due to code being hidden by the pre-processor. Using config_set in
regular C if statements is performant as the compiler can trivially detect
dead code at compile time, and at -O1 and above will not even link in symbols
referenced by dead code in these blocks, so this will not bloat image size


# 171824f7 07-Dec-2015 Adrian Danis <Adrian.Danis@nicta.com.au>

Change additional int->word_t due to interraction with the C parser to ease verification


# 2b48c688 03-Jun-2015 Adrian Danis <Adrian.Danis@nicta.com.au>

x86: make capdl.c code word size agnostic


# 914741ea 27-May-2015 Adrian Danis <Adrian.Danis@nicta.com.au>

x86: Make x86 the name of the architecture instead of IA32

IA32 is 32bit version of the x86 architecture. Whilst only IA32
is supported, much of the code is generic x86. Using a generic
x86 architecture will aid in future 64bit support