History log of /seL4-l4v-10.1.1/seL4/src/arch/riscv/object/objecttype.c
Revision Date Author Comments
# d94eda31 18-Jun-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Respect deviceMemory

Passes the `deviceMemory` flag given to `Arch_createObject` into the frame cap instead of
pretending that all frames are valid kernel object memory.


# ca9de60b 18-Jun-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Do not zero memory in Arch_createObject

It use to be be the responsibility of createObject, and by extension Arch_createObject,
to zero memory if so required. Since the riscv port was originally started the responsiblity
of zering the memory was moved to generic untyped retype handling, however this change
was never propogated to the riscv architecture. As it stands this memory zeroing is
guaranteed to zero memory that was already zeroed, which is just a performance (and proof),
issue and so we want to remove them.


# b4b7f194 18-Jun-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Add extra device frame check

This check is redundant, but provides a simplification for verification.


# f3f86874 18-Jun-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Handle ASID caps in Arch_sameRegionAs


# 82ba5150 18-Jun-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Handle ASID caps in Arch_finaliseCap


# f8f5efc7 18-Jun-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Mask frame cap rights

Correctly updates cap rights for new cap permissions through an updateCapData call


# 1b68590b 11-Apr-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

riscv: use one definition of page bits


# f0bd4437 09-Apr-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

riscv: check all frame types in Arch_isFrameType


# 8ccfef60 05-Apr-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

riscv: finally remove isVTableRoot with last usage

Where and how we use this is context dependent so it is now inlined


# 23d83d6c 04-Apr-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

riscv: remove capFTMapType

it is not used on riscv


# 635a6da4 03-Apr-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Remove incorrectly formatted printf


# ae5df972 03-Apr-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Simplify Arch_decodeInvocation

riscv only has a single kind of arch invocation, that for MMUs.


# b9bf2c05 03-Apr-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Remove unused function


# 5b17cd96 02-Apr-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Missing arch cap abstractions

These are needed after rebase


# aafa5942 27-Mar-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

RISCV: Place TODOs in the source


# 83ba0847 20-Feb-2018 Hesham Almatary <hesham.almatary@unsw.edu.au>

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64