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4cb1d5df |
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17-Jun-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Define explicit functions for registers Replaces (read|write|set|clear)_csr macros with explicit functions. This provides a boundary for verification to reason about the operation.
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d3c12988 |
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10-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Remove todos This have been converted to JIRA issues.
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0c0a0061 |
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10-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Place traps in text section Ensures that the traps are in the text section, and not the boot section, allowing for kernel memory to be safely reused.
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76c61025 |
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10-Apr-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
riscv: remove dev_pregs We don't have any devices currently, and in future they will be discovered, not statically specified.
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d50cddde |
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09-Apr-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
riscv: remove cryptic printout
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9569ad05 |
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09-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Parse the FDT during platform initialization
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a6fb504b |
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09-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Remove dtb region from free memory The DTB output should be preserved both during kernel bootup and ultimately given to the rootserver. As such we should make sure to not include it as free memory.
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97691ac4 |
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09-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Move `init_plat` The platform should not be initialized till after the cpu has been.
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d373b17d |
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09-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Provide dtb region to try_init_kernel Now that there is a different kernel window we can talk about the physical address of the dtb and read it through the kernel window to determine it's size. Currently we just pass the region to try_init_kernel, which does not yet do anything with it.
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f37b8a5c |
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09-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Remove smp boot code The SMP code is incomplete and is confusing to have broken code around.
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22b050c9 |
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05-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Redesign kernel window Restructures the kernel window so that instead of being a single contiguous region with a single offset to physical memory, it is two such regions. This allows us to use the larger of the two windows as a window into physical memory, and the second smaller window as a place to run the kernel image from. Having this additional window allows us to link the kernel for different physical addresses without needing to change its virtual address, or change the layout of the kernel window. There are other ways to achieve this, but this is one of the simplest and matches how x86-64 implements its kernel window.
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23d83d6c |
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04-Apr-2018 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
riscv: remove capFTMapType it is not used on riscv
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ecadb60c |
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03-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Declare extern in global scope Prevents a compiler warning
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93171fcb |
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03-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Valid c99 function definitions
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5aa2f7ee |
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03-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Remove dead definitions
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ddf14b49 |
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03-Apr-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
riscv: Remove broken dtb usage The dtb output is not available after we have switched to our own kernel window and since the platform should be moved till after the cpu has been initialized we remove the dtb usage for now until the kernel window can be fixed such that we can access the dtb
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6af207a0 |
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21-Feb-2018 |
Hesham Almatary <hesham.almatary@unsw.edu.au> |
RISC-V: Port FDT from riscv-pk (priv-1.10)
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aafa5942 |
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27-Mar-2018 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
RISCV: Place TODOs in the source
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83ba0847 |
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20-Feb-2018 |
Hesham Almatary <hesham.almatary@unsw.edu.au> |
[SELFOUR-1156] RISC-V Port Experimental release that supports both RV32 and RV64
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