History log of /seL4-l4v-10.1.1/seL4/src/arch/arm/64/kernel/vspace.c
Revision Date Author Comments
# 986747e7 07-Jun-2018 Sebastian Holzapfel <seb.holzapfel@data61.csiro.au>

aarch64/vspace: implement user stack tracing


# 511be7d9 10-Apr-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Call invalidateASIDEntry


# 28368e44 10-Apr-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Use invalidateTLBASID/ASIDVA functions


# 49cff315 10-Apr-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Add ASID/TLB helper functions


# f97604c3 10-Apr-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Add VMID reuse code


# 07b29e79 03-Apr-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8: Fix style


# dca5dff2 27-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Flush cache by kernel VA in EL2


# d7ea4075 27-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8: memzero an ASID pool with seL4_ASIDPoolBits


# a430d97e 27-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Switch VCPU in setVMRoot when HYP is on


# e43e4186 27-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Handle VM faults triggered by VCPUs


# a4f3fb28 27-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Use S2 format for userland if HYP is on


# c31f31b8 27-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Support EL2 stage-1 for kernel VSpace


# a948887c 27-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Map AP to stage-2 access permissions


# d4752177 27-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Add stage-2 memory attributes


# 1936323e 23-Jan-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8: Add SMP support for aarch64

(1) Use NODE_STATE() to access per-core kernel data.
(2) Allocate kernel stack in src/arch/arm/64/head.S.
(3) Use the TPIDR_EL1 to contain the kernel stack pointer
as well as the logical core ID. The kernel stack must
be 4-KiB aligned, and the lowest 12 bits of TPIDR_EL1
are for the logical core ID.
(4) Define the LD_EX, ST_EX, and OP_WIDTH as "ldxr", "stxr",
and "w".
(5) Add irq_remote_call_ipi and irq_reschedule_ipi


# 273c5cab 17-Jan-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8: change %x to %lx in kernelDataAbort

Change the type specifiers used by printf in the function
kernelDataAbort for aarch64 from %x to %lx for 64-bit data.


# fa9de32c 09-Jan-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

aarch64: Re-validate ipc buffer is not device frame

This should be redundant, but is required for verification to go throug


# d2644e8a 26-Oct-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

Declare and check IPC buffer size

Adds a named constant of the IPC buffer size bits that can be used when checking the
size/alignment of an IPC buffer. This constant has a compile time assertion to ensure
it corresponds to the actual IPC buffer


# 57fa0e0f 07-Aug-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

Share linker.h between architectures


# 40c61e5c 18-Jun-2017 Anna Lyons <Anna.Lyons@data61.csiro.au>

Fix licenses (the rest)


# 3939511d 21-Jun-2017 Bamboo <bamboo@keg.ertos.in.nicta.com.au>

[STYLE_FIX]


# 0a6f9a5d 14-Mar-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SELFOUR-748: ARM - Support local/remote TLB invalidation operations


# bc380859 21-May-2017 Bamboo <bamboo@keg.ertos.in.nicta.com.au>

[STYLE_FIX]


# bac7826a 21-May-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

Avoid using bitfield generated *_ptr_new functions

These functions can cause slow down during verification C parsing and do not currently
have any proofs about them. More importantly there is no performance impact from just
calling the regular *_new functions instead


# 0abc7202 04-Apr-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

s/DEBUG/CONFIG_DEBUG_BUILD/

DEBUG definition is not supposed to be used in the kernel, rather CONFIG_DEBUG_BUILD,
which can be toggled separately to user notion of DEBUG


# a9f57e09 01-Mar-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SELFOUR-744: ARM/SMP - Map kernel window and root task as cache-shareable

Default user PTEs/PDEs are also default to be shared. Later, we can
provide an option to allow the user not to map frames as shared.


# eccaae51 20-Feb-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

s/D61/DATA61/ in license headers for consistency


# 0b2fe8d6 17-Jan-2017 amrzar <azarrabi@nicta.com.au>

aarch64: Initial implementation


# fac16fe8 11-Jan-2017 amrzar <azarrabi@nicta.com.au>

aarch64: add preliminary folders and Makefiles