SELFOUR-1491: error if set trigger not supported

So far this is only implemented for the GIC, which most of our platforms
use. Error if this invocation is made on another platform, and guard
calls to the trigger function if it is not supported.

arm/gic: Guard struct gich_vcpu_ctrl_map

arm: Move VGIC code to gic_pl390 files

Share linker.h between architectures

SMP: Introduce ENABLE_SMP_SUPPORT

- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check

SELFOUR-746: ARM/GIC - Provide IPI support

SELFOUR-746: ARM/GIC - bank active_irq for each core

ARM/Boot: initialise private timer, user access and benchmark in CPU context

In SMP context, init_cpu is meant to be called for each CPU, where
initialising private timer, user access and benchmarks (basically CCNT)
are per-CPU operations and involve per-CPU hardware
resources/interrupts.

Remove many MODIFIES annotations.

These are redundant for any function which the C-to-Isabelle parser
actually analyses, which is now the vast majority of functions.

Remove many DONT_TRANSLATE markers.

The vast majority of the DONT_TRANSLATE markers in the kernel are used
to hide __asm__ statements and builtin functions
(e.g. __builtin_unreachable ()) from the C-to-Isabelle parser.

The parser now supports underscore identifiers and many __asm__ statements,
and the builtin functions are prototyped, meaning the vast majority of the
DONT_TRANSLATE markers can be dropped. The remaining markers cover functions
that must be treated specially.

Fix prototyping for constant address pointers.

Previous change adf91d4be0d805976a56fe48ba5cc76fc9572b53
introduces const inconsistently for two pointers.

SELFOUR-607: unify irqInvalid for arm gic_pl390.h

SELFOUR-607: gic_pl390: inline and cleanup.

Inline non-boot irq functions called on the irq path.
This improves performance of interrupt paths through code locality.

Additionally, remove unused functions and use the BIT macro
rather than redefining it.

Refactor duplicated code in hardware.h

One copy to rule them all.

x86: IOAPIC/MSI syscalls

Restructure the x86 interrupt handling to allow for a more flexible
method of using IOAPIC and MSI interrupts. The essence of this change
is to allow for the user to pick, for both IOAPIC and MSIs, which
CPU vector to use. Additionally there is future support, in the API,
for seL4 to eventually protect MSI interrupts with the vt-d interrupt
routing tables.

API behaviour for legacy systems using the PIC is preserved

Part of SELFOUR-281

Support IOAPIC on ia32 and modify interrupt handling to support user level setting of modes

Release snapshot