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d46d4be0 |
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21-Feb-2018 |
Yanyan Shen <yanyan.shen@data61.csiro.au> |
armv8: Define CNT_TVAL and CNT_CTL for EL2.
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49a26db1 |
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19-Nov-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Combine common arm generic timer code Previously both aarch32 and aarch64 duplicated common generic timer code. Unify them in include/arch/arm/machine/timer.h
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cb814780 |
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16-Nov-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
aarch64: add constants for generic timer This brings the aarch64 generic timer into exactly the same code as the aarch32 generic timer.
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c11f18cb |
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16-Nov-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
ARM generic timers: use aarch agnostic macros
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9e5f1e60 |
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26-Sep-2017 |
Nathan Studer <nathan.studer@dornerworks.com> |
Make clock check a warning only instead of a hard fault This clock value isn't set consistently on some platforms due to software rounding, so halting here tends to happen a lot. Instead print a warning and continue on. For example using a default Xilinx platform with a 33.333... MHz oscialltor and a default bootloader the clock value will be somewhere in the range 99999000-100000000, which for most practical purposes is the same thing. Since this register is written by software and doesn't have the precision to fully represent common hardware oscillator frequencies, this check seems overly strict anyway.
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40c61e5c |
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18-Jun-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Fix licenses (the rest)
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eccaae51 |
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20-Feb-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
s/D61/DATA61/ in license headers for consistency
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0b2fe8d6 |
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17-Jan-2017 |
amrzar <azarrabi@nicta.com.au> |
aarch64: Initial implementation
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fac16fe8 |
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11-Jan-2017 |
amrzar <azarrabi@nicta.com.au> |
aarch64: add preliminary folders and Makefiles
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