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49a26db1 |
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19-Nov-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Combine common arm generic timer code Previously both aarch32 and aarch64 duplicated common generic timer code. Unify them in include/arch/arm/machine/timer.h
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3de2b5cf |
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19-Nov-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Initialise gpt_cnt_tval to squash compiler warning
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fff4f1b5 |
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19-Nov-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Make TIMER_RELOAD check 64-bit compatable This check checks the TIMER_RELOAD fits in the wordsize. Use UINTPTR_MAX instead of 0xffffffff so the check can be moved to mode agnostic code.
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c11f18cb |
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16-Nov-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
ARM generic timers: use aarch agnostic macros
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9e5f1e60 |
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26-Sep-2017 |
Nathan Studer <nathan.studer@dornerworks.com> |
Make clock check a warning only instead of a hard fault This clock value isn't set consistently on some platforms due to software rounding, so halting here tends to happen a lot. Instead print a warning and continue on. For example using a default Xilinx platform with a 33.333... MHz oscialltor and a default bootloader the clock value will be somewhere in the range 99999000-100000000, which for most practical purposes is the same thing. Since this register is written by software and doesn't have the precision to fully represent common hardware oscillator frequencies, this check seems overly strict anyway.
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40c61e5c |
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18-Jun-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Fix licenses (the rest)
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fdc96a18 |
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07-Jun-2017 |
Anna Lyons <Anna.Lyons@data61.csiro.au> |
Warn in arm generic timer if reload value is too high
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eccaae51 |
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20-Feb-2017 |
Adrian Danis <Adrian.Danis@data61.csiro.au> |
s/D61/DATA61/ in license headers for consistency
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28f09e2e |
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17-Jan-2017 |
amrzar <azarrabi@nicta.com.au> |
ARM: Move timer.h to mode specific folder
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