| #
908787f3 |
|
15-Jul-2018 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
aspec/haskell: clean out resolved FIXMEs
|
| #
d9c08fc7 |
|
12-Feb-2018 |
Gerwin Klein <gerwin.klein@data61.csiro.au> |
aspec/haskell/machine: refactor user_context interface
- remove separate abstract set_/get_register implementation, directly use machine op
- make interface aware that user_context does not always need to equal
(register => machine_word)
- introduce FPU state on x64
|
| #
a5a5edc8 |
|
28-Nov-2017 |
Joel Beeren <joel.beeren@data61.csiro.au> |
VER-849: abstractly declare a threads registers have changed
This removes an ifdef present in invokeTCB_(Copy|Write)Registers, and
adds the function Arch_postModifyRegisters which does nothing on any
arch except x86-64.
|
| #
6b862c0c |
|
21-Sep-2017 |
Joel Beeren <joel.beeren@nicta.com.au> |
x64: spec: remove needless restriction on TLS_BASE values
|
| #
f05bc45d |
|
10-Aug-2017 |
Joel Beeren <Joel.Beeren@data61.csiro.au> |
misc: clean up before merging x64
|
| #
22999e54 |
|
09-Aug-2017 |
Matthew Brecknell <Matthew.Brecknell@data61.csiro.au> |
aspec: integrate all architectures
|
| #
15f32f4d |
|
12-Mar-2017 |
Joel Beeren <joel.beeren@nicta.com.au> |
x64: ASpec builds after merge for ARM, X64
|
| #
5bdcbe53 |
|
09-Jan-2017 |
Matthew Brecknell <Matthew.Brecknell@data61.csiro.au> |
fix ARM build after merge
Also:
- move some ARM-specific things out of Tcb_AI
- port changes from ARM to X64, up to beginning of ArchVSpace_AI
|