libsel4bench: Support dangerous MSR interface

Uses the dangerous MSR interface if it's enabled instead of DebugRun

libsel4bench: Abstraction for reading/writing msr

libsel4bench: Remove unused function

libsel4bench: Use kernel exported PMC

Change 1 << * to BIT(*) in some cases

Fix licenses

sel4bench: fix bug in sel4bench_reset_counters x86

sel4bench: Fix incorrect variable name

sel4bench: reset all counters

Resetting a subset of the counters a) doesn't work on all platforms c)
doesn't make much sense and b) is less code, d) unused functionality

If this functionality is required it can be readded in a working form at
a later date.

sel4bench: use 'mask' instead of 'counters'

This avoids confusion in loops that used to modify both 'counter' and
'counters'

sel4bench: style

sel4bench: use ccnt_t and remove duplicate

Was duplicated sel4bench_counter_t and format function

sel4bench: improve interface

- define array of generic events
- drop generic events that don't exist for all platforms (i.e are not
generic)
- define number of generic events
- define types to illustate the difference between a counter and an
event

sel4bench: remove layer of indirection in events

No longer required now directory structure is fixed.

sel4bench: fix ia32 includes

sel4bench: use #pragma once

libsel4bench: Add performance counter events for Sandy Bridge, Haswell and Skylake

libsel4bench: Support for x86-64

sel4bench: move READ_COUNTER macros to sel4bench

Move ccnt_t to sel4bench arch headers

It was in an #ifdef in the sel4bench app.