History log of /seL4-camkes-master/kernel/src/arch/arm/object/tcb.c
Revision Date Author Comments
# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# b6417f21 20-Mar-2019 Curtis Millar <curtis.millar@data61.csiro.au>

Remove platform IPC buffer register.

This removes the assumption that each platform sotres the IPC buffer
address in a platform-specific register. The IPC buffer address is
instead stored in a thread-local variable in libsel4 which must be
initialised by the runtime.


# f6e5e218 20-Mar-2019 Kent McLeod <Kent.Mcleod@data61.csiro.au>

Remove symlinked libsel4 files from include dir

These files can be included normally using libsel4 include paths. This
removes situations where the same file is available under different
include paths due to symlinking into different directory structures.


# d0930f67 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: consistently attach return type

Add attach-return-type to astyle


# bff71896 26-Jun-2018 Anna Lyons <Anna.Lyons@data61.csiro.au>

arm: remove assumption that CONFIG_IPC_BUF_* must be set

Previously arm code assumed that either CONFIG_IPC_BUF_TPIDRURW or
CONFIG_IPC_BUF_GLOBALS_FRAME needed to be set. Given that neither of
these options are required for aarch64, remove this assumption and only
guard code with #ifdefs are required.


# ae9fe9b5 07-Aug-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

aarch64: Use tpidrro_el0 for IPC buffer instead of tpidr_el0

Changing the register used for the IPC buffer is useful as the standard TLS model for
aarch64 is to use tpidr_el0 for the thread pointer, which we are presently using
for the IPC buffer. This therefore paves the way for implementing proper TLS support
on aarch64.

Since we are not using tpidr_el0 for the IPC buffer we need to save/restore (or at
least clear) this register on thread switch to prevent it being a user channel. Saving
and restoring of it is achieved by ensuring CONFIG_IPC_BUF_TPIDRURW is not set, which
as we are no longer using this strategy this will be the case. To that end as aarch64
only has one IPC buffer strategy this commit makes the choice of IPC buffer strategy
dependeont on aarch32.


# ee28936d 18-Jun-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SMP: Introduce ENABLE_SMP_SUPPORT

- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check


# 64d576fb 12-Jun-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SELFOUR-806: aarch32 - Implement lazy FP save/restore

This commit implements lazy FP save/restore mechanism, required for user threads
when they use the FPU. The following caveats take place:

* Only support synchronous exceptions. No support for asynchronous ones.
* VFP opcodes are used instead of normal instructions to discard compiler warnings/errors.
* Support is limited to specific ARM subarchitectures we support and tested this commit on.
* Disable the FPU by default if users are not using it to avoid channels.
* FPU support is not verified yet.
* Will not work properly if using a VM that's running besides other VMs/threads that are using the FPU.


# 4baa8482 28-Jun-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SELFOUR-746: IPI Handler for ARM


# 2c398b7b 14-Mar-2017 Stephen Sherratt <Stephen.Sherratt@data61.csiro.au>

Abstract setting ipc buffer register into arch fn


# 67cdff7b 14-Feb-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SMP: Move/rename migrateTCB() arch tcb.c


# 33a771d3 12-Jul-2016 Anna Lyons <Anna.Lyons@nicta.com.au>

Split fault types into arch/generic

Prior to this commit faults were separate
per architecture. This commit extracts the common
fault types and introduces arch specific faults,
reducing code duplication across architectures.


# bebfcf6d 23-Jun-2016 Kofi Doku Atuah <kofi.dokuatuah@nicta.com.au>

SELFOUR-499: X86, ARM: Add userspace invocations for hardware debugging

This commit implements the body of SELFOUR-499. The API exposes the x86 DR0-7
and ARM coprocessor 14 features to userspace by virtualizing them as context-
switched registers in the TCB. Implemented as TCB invocations. This feature is
only built when CONFIG_HARDWARE_DEBUG_API is selected.

* Add low-level support routines for setting, unsetting, getting, enabling
and disabling breakpoints.
* Add support for single-stepping as well.
^ Single-stepping is not supported on ARMv6 since the hardware
doesn't have support.
^ ARM implements single-stepping as instruction breakpoints
configured to fault on every instruction -- this is achieved through
the "mismatch" mode, which is only supported from ARMv7 onwards.
* Also support explicit software break requests, a la "BKPT" and "INT $3".

* New invocations:
* seL4_TCB_SetBreakpoint().
* seL4_TCB_GetBreakpoint().
* seL4_TCB_UnsetBreakpoint().
* seL4_TCB_ConfigureSingleStepping().
* New constants:
^ Event types:
^ seL4_InstructionBreakpoint.
^ seL4_DataBreakpoint.
^ seL4_SoftwareBreakRequest.
^ Access types:
^ seL4_BreakOnRead.
^ seL4_BreakOnWrite.
^ seL4_BreakOnReadWrite.
^ Exports:
^ seL4_NumHWBreakpoints.
^ seL4_NumExclusiveBreakpoints.
^ seL4_NumExclusiveWatchpoints.
^ seL4_NumDualFunctionMonitors.
^ seL4_FirstBreakpoint.
^ seL4_FirstWatchpoint.
^ seL4_FirstDualFunctionMonitor.

See documentation in the seL4 API manual.


# 69f140a2 11-Jul-2016 Anna Lyons <Anna.Lyons@nicta.com.au>

trivial: remove duplicated setMRs_syscall_error


# 5f0ae410 02-Jun-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

arm-hyp: Minor cleanups

Cleanup some small licensing, whitespace and configuration details


# 67bcf235 02-Mar-2016 Yanyan Shen <yanyan.shen@nicta.com.au>

arm_hyp: rm ARM_HYP ifdefs; func inline assembly

vcpu.c:
encapsulate inline assembly into inline functions that added to
device_pl2.h file.

other files:
replace #ifdef ARM_HYP with config_set(ARM_HYP)


# 8e2e8db9 02-Mar-2016 Yanyan Shen <yanyan.shen@nicta.com.au>

arm_hyp: rm ARM_HYP ifdefs; func inline assembly

vcpu.c:
encapsulate inline assembly into inline functions that added to
device_pl2.h file.

other files:
replace #ifdef ARM_HYP with config_set(ARM_HYP)


# 171824f7 07-Dec-2015 Adrian Danis <Adrian.Danis@nicta.com.au>

Change additional int->word_t due to interraction with the C parser to ease verification


# 0ecff9f3 09-Nov-2015 Adrian Danis <Adrian.Danis@nicta.com.au>

unsigned int -> word_t


# 908c589a 19-Feb-2015 akroh <Alexander.Kroh@nicta.com.au>

ARM HYP: Trap SMC


# 52c1a5f3 07-Oct-2014 akroh <Alexander.Kroh@nicta.com.au>

Report IPA for restart address in vm faults


# a318446f 07-Jul-2014 TrustworthySystems <gatekeeper@sel4.systems>

Recommit of arm_hyp branch on release snapshot


# 91b7da86 17-Jul-2014 TrusthworthySystems <gatekeeper@sel4.systems>

Release snapshot