History log of /seL4-camkes-master/kernel/src/arch/arm/machine/cache.c
Revision Date Author Comments
# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# c06df578 02-Feb-2020 Luca(Wei) Chen <Wei@cvluca.com>

ARM: Add support to flush L1 caches

Extend the existing seL4_BenchmarkFlushCaches without modifing the usage
of it. Will be used in sel4bench to measure the cold cache performance.


# 7d55e217 30-Jun-2019 Anna Lyons <anna@gh.st>

arm: CONFIG_L1_CACHE_LINE_SIZE_BITS in cmake

Move definition of L1_CACHE_LINE_SIZE_BITS to cmake where it is set
according to the arm processor family.

This removes duplication in the hardware.h header files and makes adding
a new processor family require less lines changed.


# d0930f67 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: consistently attach return type

Add attach-return-type to astyle


# b88d7701 12-Feb-2019 Kent McLeod <Kent.Mcleod@data61.csiro.au>

arm: Rename plat_cleanInvalidateCache

Rename plat_cleanInvalidateCache to plat_cleanInvalidateL2Cache to
indicate that it is a L2 cache maintenance operation only.


# 3ad71a0f 27-Oct-2016 Bamboo <bamboo@keg.ertos.in.nicta.com.au>

[STYLE_FIX]


# 44ed6adb 12-Oct-2016 Anna Lyons <Anna.Lyons@data61.csiro.au>

add seL4_BenchmarkFlushCaches() for arm and ia32

Available when CONFIG_ENABLE_BENCHMARKS is set, flushes caches for
running cold-cache benchmarks


# 67d8d041 14-May-2015 Thomas Sewell <Thomas.Sewell@nicta.com.au>

Ghost assertions about max object size.


# 91b7da86 17-Jul-2014 TrusthworthySystems <gatekeeper@sel4.systems>

Release snapshot