History log of /seL4-camkes-master/kernel/src/arch/arm/64/object/objecttype.c
Revision Date Author Comments
# 7d91ce8e 22-Nov-2020 Siwei Zhuang <siwei.zhuang@data61.csiro.au>

arm: give away FPU on thread delete

The ownership of FPU would only be updated when a thread causes FPU
exception. If the thread being deleted owns the FPU, the ownership needs
to be given away proactively to avoid memory corruption.

Reported-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>
Signed-off-by: Siwei Zhuang <siwei.zhuang@data61.csiro.au>


# 6ad15c0f 26-Oct-2020 Oliver Scott <Oliver.Scott@data61.csiro.au>

trivial: clean up code for C parser

Remove unused cases and add break in switch statements.
Add conditions to sel4arch.xml.
Change guard in capdl printing to correct TK1_SMMU.
Set KernelArmSMMU default to off.
Add types to aarch32 syscall_stub_gen.py.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# c66d9cee 03-Aug-2020 Oliver Scott <Oliver.Scott@data61.csiro.au>

trivial: style and comment

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 935714a4 15-Jun-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: TLB coherency between MMU and SMMU

The kernel connects ASID used in MMU and context banks used in
SMMU, and conducts TLB invalidation on context banks if a page
entry is invalidated from MMU is also used in SMMU.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 35bb485e 21-Jan-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: supporting cap deletion on control caps

Providing support to delete the two control caps: the
stream ID control cap and the context bank control cap.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 69c9f55f 21-Jan-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: supporting deletion on stream ID caps

Providing support to delete stream ID caps and remove any assigned
context banks to deleted stream ID caps.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 1ef6e6c7 16-Jan-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: supporting unbind context banks

Providing system calls on stream ID caps that unbinds its
context banks. Any future transaction using this stream ID
will result on faluts.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 38ed1046 14-Jan-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: supporting unassign vspace in context banks

Providing a system call that removes an assigned vspace root from its
context bank. This operation causes the context bank being disabled
as it does not have a valid vspace root after the unassignment.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# cb0ef83a 09-Jan-2020 Qian Ge <qian.ge@data61.csiro.au>

SMMU: supporting copying SMMU caps

Supporting deriving SMMU caps, which is required by
cap copy operations.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 73e062bd 12-Nov-2019 Qian Ge <qian.ge@data61.csiro.au>

SMMU: assigning vspace to context banks

Supporting user-level applications to assign vsapce root to context
banks through system calls. This commit also configures the context
bank according to stage 1 or stage 2 requirement.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 0cf122a0 09-Oct-2019 Qian Ge <qian.ge@data61.csiro.au>

SMMU: system calls for creating SID and CB caps

Providing system calls on stream ID control cap and context bank
control cap for creating stream ID and context bank caps.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>


# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# b1788e02 08-Jul-2019 Anna Lyons <anna@gh.st>

aarch64: add support for 40-bit PA

This commit adds support for using a 40-bit physical addresses in
aarch64-hyp mode.

40-bit PA support is implemented by using a 3-stage translation, with a
13 bit page upper directory as the vspace root. PageGlobalDirectories
are not used in this configuration.

To use 40-bit PAs, platforms should set KernelArmPASizeBits40 to ON.

Co-authored-by: Yanyan Shen <yanyan.shen@data61.csiro.au>
Co-authored-by: Chris Guikema <chris.guikema@dornerworks.com>


# 8af1aa77 16-Jul-2019 Anna Lyons <anna@gh.st>

aarch64: abstract vspace_root in vspace code

On aarch64-hyp the virtual address translation structure can differ
depending on the physical address range. This commit prepares to support
more than a single physical address range by removing the assumption
that the top-level structure in a vspace is a PGD, replacing it with the
concept of a vspace_root.

Specifically:
- add and use macros to refer to vtable bitfield generator functions
- use the existing vspace_root_t type rather than pgde_t
- pull performASIDPoolInvocation into header
- add and use VSPACE_PTR rather than PGDE_PTR
- rename decodeARMVPageGlobalDirectoryInvocation to refer to VSpace
- update comments/error messages
- rename variables


# d0930f67 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: consistently attach return type

Add attach-return-type to astyle


# 6ad387d2 12-Apr-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Dissociate VCPU when deleting a thread


# 5cf1d386 02-Apr-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8: Fix style


# d6ea3861 26-Mar-2018 Yanyan Shen <yanyan.shen@data61.csiro.au>

armv8/hyp: Add cap_vcpu_cap in objecttype.c


# 2cfff40d 04-Feb-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

Allow Arch_finaliseCap to return cleanup information

Changes Arch_finaliseCap and Mode_finaliseCap to return the same finaliseCap_ret_t type
as finaliseCap. This allows the Arch and Mode specific functions to define cleanup
information of its capabilities if necessary, just like the generic capabilities can
in finaliseCap.


# 40c61e5c 18-Jun-2017 Anna Lyons <Anna.Lyons@data61.csiro.au>

Fix licenses (the rest)


# 353f0574 23-Apr-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

arm: Pass 'call' down to invokeVCPUReadReg

invokeVCPUReadReg should not be setting message registers for the return message unless
the user performed a call. In doing so we must refactor the call to readVCPUReg to
outside the introduced `if` condition since, as it performs machine operations, it
should always happen


# eccaae51 20-Feb-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

s/D61/DATA61/ in license headers for consistency


# 0b2fe8d6 17-Jan-2017 amrzar <azarrabi@nicta.com.au>

aarch64: Initial implementation


# fac16fe8 11-Jan-2017 amrzar <azarrabi@nicta.com.au>

aarch64: add preliminary folders and Makefiles