History log of /seL4-camkes-master/kernel/libsel4/include/sel4/benchmark_track_types.h
Revision Date Author Comments
# 512a0200 19-Mar-2020 Qian Ge <qian.ge@data61.csiro.au>

replacing all ifndef with pargma once

All the kernel header files now use pargma once rather than the ifndef,
as the pre-processed C files do not change while header files
are protected with pargma once. This will also solve any naming issues
caused by ifndef.


# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# d2eeace9 12-May-2019 Sylvain Gauthier <sylvain.gauthier@data61.csiro.au>

Benchmark: specify on which core IRQ was delivered

Add a core field in the log entries to log on which core an interrupt
was delivered.


# 0ab7f001 12-May-2019 Sylvain Gauthier <sylvain.gauthier@data61.csiro.au>

Preliminary fix in benchmark_track_types

A few fixes in the benchmark code: missing include of <stdint.h> and a
a PACKED macro that should be SEL4_PACKED.


# 07f94833 18-Jun-2017 Anna Lyons <Anna.Lyons@data61.csiro.au>

libsel4: fix licenses

- some were incorrectly marked GPL (libsel4 is BSD)
- update NICTA --> DATA61 etc
- fix tags D61 --> DATA61
- update year to 2017


# fc0f1eec 04-May-2017 Anna Lyons <Anna.Lyons@data61.csiro.au>

kernel entry tracking: track VMExit and VCPUfault


# 49f26d5c 19-Oct-2016 Anna Lyons <Anna.Lyons@data61.csiro.au>

Fix benchmark_debug_syscall_start

The lowest syscall number is -8, which doesnt' fit in 3 bits -> change
to 4.
Also, we were storing the -ve number, which also doesn't fit into 3
bits -> invert it when we store it.


# bebfcf6d 23-Jun-2016 Kofi Doku Atuah <kofi.dokuatuah@nicta.com.au>

SELFOUR-499: X86, ARM: Add userspace invocations for hardware debugging

This commit implements the body of SELFOUR-499. The API exposes the x86 DR0-7
and ARM coprocessor 14 features to userspace by virtualizing them as context-
switched registers in the TCB. Implemented as TCB invocations. This feature is
only built when CONFIG_HARDWARE_DEBUG_API is selected.

* Add low-level support routines for setting, unsetting, getting, enabling
and disabling breakpoints.
* Add support for single-stepping as well.
^ Single-stepping is not supported on ARMv6 since the hardware
doesn't have support.
^ ARM implements single-stepping as instruction breakpoints
configured to fault on every instruction -- this is achieved through
the "mismatch" mode, which is only supported from ARMv7 onwards.
* Also support explicit software break requests, a la "BKPT" and "INT $3".

* New invocations:
* seL4_TCB_SetBreakpoint().
* seL4_TCB_GetBreakpoint().
* seL4_TCB_UnsetBreakpoint().
* seL4_TCB_ConfigureSingleStepping().
* New constants:
^ Event types:
^ seL4_InstructionBreakpoint.
^ seL4_DataBreakpoint.
^ seL4_SoftwareBreakRequest.
^ Access types:
^ seL4_BreakOnRead.
^ seL4_BreakOnWrite.
^ seL4_BreakOnReadWrite.
^ Exports:
^ seL4_NumHWBreakpoints.
^ seL4_NumExclusiveBreakpoints.
^ seL4_NumExclusiveWatchpoints.
^ seL4_NumDualFunctionMonitors.
^ seL4_FirstBreakpoint.
^ seL4_FirstWatchpoint.
^ seL4_FirstDualFunctionMonitor.

See documentation in the seL4 API manual.


# ef00e986 21-Aug-2016 Anna Lyons <Anna.Lyons@data61.csiro.au>

SELFOUR-615: arm entry point stubs


# a84964ba 06-Jun-2016 Hesham Almatary <Hesham.Almatary@nicta.com.au>

SELFOUR-446 Benchmark: Share kernel entry types with user-level