History log of /seL4-camkes-master/kernel/include/arch/riscv/arch/object/structures.h
Revision Date Author Comments
# 06928c1a 12-Apr-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

riscv: cap_get_archCapIsPhysical unreachable case

The spec expects cap_get_archCapIsPhysical to return false for the
unreachable case. While we could prove that the case is unreachable in
all contexts the function is called, it needs fewer (=no) preconditions
when it provides a safe default instead.

Signed-off-by: Gerwin Klein <gerwin.klein@data61.csiro.au>


# 451535a8 07-Apr-2020 Rafal Kolanski <rafal.kolanski@data61.csiro.au>

riscv: use same vm_rights as x86 for caps

Rights on frame caps differ somewhat between architectures, not entirely
in consistent ways. An example is handling write-only frame rights,
where riscv departs from x86. The vm_rights enumeration is not dictated
by hardware, hence we should strive towards consistency.

This change removes VMWriteOnly and makes riscv vm_rights and rights
masking match x86, to facilitate verification of riscv with reduced
proof changes. It does for the time being remove the ability for
write-only frames on riscv.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>


# 0548f8d7 02-Apr-2020 Rafal Kolanski <rafal.kolanski@data61.csiro.au>

riscv: use word_t rather than "unsigned int"

For other platforms, word_t is used for passing length and size
parameters and adapts to 32 and 64-bit platforms appropriately.
The riscv platforms stands out by using "unsigned int" unlike the
others.

Reduce usage of "unsigned int" to match the other 64-bit verification
target platform, x86 64-bit.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>


# 512a0200 19-Mar-2020 Qian Ge <qian.ge@data61.csiro.au>

replacing all ifndef with pargma once

All the kernel header files now use pargma once rather than the ifndef,
as the pre-processed C files do not change while header files
are protected with pargma once. This will also solve any naming issues
caused by ifndef.


# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# d0930f67 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: consistently attach return type

Add attach-return-type to astyle


# 761006e0 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: consistently align pointer with name

Run astyle with align-pointer=name


# 64b7bd9f 13-Jun-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: pte_t type in asid_pool

The asids in risc-v only point to pte_t and so this does not need to be a void* type


# 13f0a4e8 25-Apr-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Implement Arch_isCapRevocable


# 61df56a7 05-Apr-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Remove VMNoAccess mapping type

A frame cannot be mapped without any access permissions, as this encoding is used to
represent a page table mapping.


# 4ebe773f 02-Apr-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: VMWriteOnly vm right

Unlike other architectures riscv supports write only mappings and it simplifies management
of cap rights to actually support it.


# 83ba0847 20-Feb-2018 Hesham Almatary <hesham.almatary@unsw.edu.au>

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64