History log of /seL4-camkes-master/kernel/include/arch/riscv/arch/object/objecttype.h
Revision Date Author Comments
# 1f93e050 17-Apr-2020 Rafal Kolanski <rafal.kolanski@data61.csiro.au>

riscv: tweak Arch_isFrameType argument name

It was 'type' on all other arches, but 't' on riscv. Being consistent
here means we can have the same proof for all arches.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>


# 0548f8d7 02-Apr-2020 Rafal Kolanski <rafal.kolanski@data61.csiro.au>

riscv: use word_t rather than "unsigned int"

For other platforms, word_t is used for passing length and size
parameters and adapts to 32 and 64-bit platforms appropriately.
The riscv platforms stands out by using "unsigned int" unlike the
others.

Reduce usage of "unsigned int" to match the other 64-bit verification
target platform, x86 64-bit.

Signed-off-by: Rafal Kolanski <rafal.kolanski@data61.csiro.au>


# 512a0200 19-Mar-2020 Qian Ge <qian.ge@data61.csiro.au>

replacing all ifndef with pargma once

All the kernel header files now use pargma once rather than the ifndef,
as the pre-processed C files do not change while header files
are protected with pargma once. This will also solve any naming issues
caused by ifndef.


# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# c9701e3f 24-Jul-2019 Edward Pierzchalski <ed.pierzchalski@data61.csiro.au>

unify userSize type declarations

Other declarations of `userSize` give it the type `word_t`. Since proofs
use a mangled name that includes the type, giving `userSize` different
types at different locations occasionally breaks proofs.


# d0930f67 18-Mar-2019 Anna Lyons <Anna.Lyons@data61.csiro.au>

style: consistently attach return type

Add attach-return-type to astyle


# 5b17cd96 02-Apr-2018 Adrian Danis <Adrian.Danis@data61.csiro.au>

riscv: Missing arch cap abstractions

These are needed after rebase


# 83ba0847 20-Feb-2018 Hesham Almatary <hesham.almatary@unsw.edu.au>

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64