riscv: Implement benchmark log buffer

Can now perform benchmarks on the kernel using the log buffer to trace
kernel behavior.

Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>

risc-v: Implement benchmark timestamp

Implements timestamp function used by benchmark logging utilities.

Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>
Signed-off-by: Curtis Millar <curtis@curtism.me>

Invert address mapping diagrams

This makes all daigrams have their first address at the end of the
diagram and their last address at the start of the diagram.

Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>

Consolidate kernel virtual memory regions

Each architecture now only needs to describe the bounds of the three
memory regions: the 1:1 mapped physical memory region, the kernel ELF
region (which may or may not overlap the physical memory region) and the
device / kernel page table region.

The physical base address of the 1:1 mapped physcial memory region and
the kernel ELF region must also be specified.

The top of user addressable memory (where in the same virtual address
space as the kernel) is defined by USER_TOP.

The physic memory virtual mapping is described by PPTR_BASE and
PPTR_TOP. The base physical memory address is PADDR_BASE and is the
physical address used to map PPTR_BASE.

Don't use kernelBase when referring to the base of the 1:1 mapped
physical memory window.

The kernel ELF virtual address region is described by KERNEL_ELF_BASE
and extends until the virtual address of the symbol `ki_end` which is
created by the linker. KERNEL_ELF_PADDR_BASE is the base address of
the physical memory region used to map the kernel and is the address to
which KERNEL_ELF_BASE maps.

KERNEL_ELF_BASE and KERNEL_ELF_PADDR_BASE do not need to be aligned to a
page size boundary as they are approriately truncated during boot by the
`map_kernel_window` function.

KDEV_BASE describes the base virtual address of the kernel device region
and the region is assumed to extend to the end of virtual memory.

Note: The offset between PPTR_BASE and PADDR_BASE is used to translate
the virtual address of all untyped objects to physical addresses. This
includes device untyped objects or frame objects where the virtual
address does not fall within the 1:1 mapped physical memory region.

Signed-off-by: Curtis Millar <curtis.millar@data61.csiro.au>

replacing all ifndef with pargma once

All the kernel header files now use pargma once rather than the ifndef,
as the pre-processed C files do not change while header files
are protected with pargma once. This will also solve any naming issues
caused by ifndef.

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.

rename KDEV_PPTR/PPTR_KDEV to KDEV_BASE

This is the virtual address for the start of the kernel device mapping
region.

riscv: Fix rollover when reading time in 32-bit

If the time is being read in 32-bit mode it is read in two operations
between which the time can change. If the time causes the low bits to
roll over to 0 and the high bits to increment between reading the low
and high bits an incorrect time will be returned.

A check is added to ensure that an accurate time is returned.

riscv: Relocate read time to header

Move the RISCV function to read the current time to the header file so
that it can be inlined for MCS.

RISCV: Add Hifive unleashed platform

This change adds support for Hifive unleashed board. It also removes the
outdated hifive suport from the spike platform.

CMake: Generate device headers from DTS for spike

The DTS compilation was arm platforms only. Moving it to the top level
config file, making it available to RISCV platforms. The generated files
are almost identical with minor differences. A new argument(--arch) is
added to the hardware_gen.py for the differences.

riscv: remove trailing whitespace line

riscv: move LOAD to hardware.h in mode

removes the #ifdef and uses the dir structure instead.

[SELFOUR-1156] RISC-V Port

Experimental release that supports both RV32 and RV64