SMMU: basic driver for init and probing

Introducing the driver in kernel for detecting SMMU features
and initialise the hardware.

Signed-off-by: Oliver Scott <Oliver.Scott@data61.csiro.au>

replacing all ifndef with pargma once

All the kernel header files now use pargma once rather than the ifndef,
as the pre-processed C files do not change while header files
are protected with pargma once. This will also solve any naming issues
caused by ifndef.

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.

arm_hyp: Move PGD definitions out of libsel4

The PGD constants refer to the top level mapping object used by the
kernel for its own private mappings. Userlevel cannot create any PGD
objects and so these constants don't belong in libsel4.

More standard constant name, moved ASID constants to arch generic files

Remove symlinked libsel4 files from include dir

These files can be included normally using libsel4 include paths. This
removes situations where the same file is available under different
include paths due to symlinking into different directory structures.

style: consistently attach return type

Add attach-return-type to astyle

style: consistently align pointer with name

Run astyle with align-pointer=name

Dedup user_data and user_data_device definitions.

These are reasonably expected to exist on every platform by the
UMM type generator. They also had identical definitions, so we
consolidate them.

ARM32: typedef vspace_root_t

Similar to x86, and avoid #ifdefs in fastpath.c arch-independent code

SELFOUR-879: expose index and entry constants

rename arch_tcb.vcpu -> arch_tcb.tcbVCPU, vcpu.tcb -> vcpu.vcpuTCB

struct vcpu { struct tcb* tcb; ...
struct arch_tcb { struct vcpu* vcpu; ...
and
struct tcb { struct arch_tcb tcbArch; ...

These conspire to generate a type error on verification side due to
assumptions about non-colliding names.

Pass tcb_t to sanitiseRegister instead of arch_tcb_t

arm: SELFOUR-781: Only allow threads with VCPU to run outside user mode

Previously any thread could be set to run in any mode (except HYP mode).
Whilst this causes no security issues for the kernel, different execution
modes in ARM have different banked registers. These registers are not
currently saved and restored allowing for threads to manipulate registers
that will be seen (or potentially are being actively used) by other threads.

Saving and restoring these banked registers for all threads is a performance
cost (even if only done for the actual mode the thread runs in) for no real
benefit, as there is no clear reason to run a thread in other modes if you
do not have a vcpu. Therefore this commit restricts being in modes other than
user to threads that have a vcpu. When multiple VCPUs are properly supported
the switching of VCPUs will then save/restore these banked registers.

SELFOUR-421: Arch_createObject changed to use new user_data_device in ghostupdates for device pages

SELFOUR-421 Introduce explicit device frames and untypeds

Kernel objects cannot be created from device untypeds, with the
exception of frames, which do not get zeroed and cannot be used
as an IPC buffer. Device untypeds additionally cannot be used
in the construction of ASID pools.

This then changes the API to the rootserver (i.e. bootinfo) to
send device untypeds instead of device frames. On ARM these
device untypeds are the same as the previously exported device
frame regions. On x86 PCI scanning is removed and all physical
memory addresses (that are not important for kernel integrity)
are released to the user.

In order to have bits in the frame and untyped caps on ARM the
number of software ASIDs had to be reduced from 2^18 to 2^17,
and the maximum untyped size reduced from 2^31 to 2^30

SELFOUR-556: Rationalize BITS vs INDEX_BITS

s/PGD_BITS/PGD_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices

SELFOUR-556: Rationalize BITS vs INDEX_BITS

s/PD_BITS/PD_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices

SELFOUR-556: Rationalize BITS vs INDEX_BITS

s/PT_BITS/PT_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices

SELFOUR-556: Rationalize BITS vs INDEX_BITS

s/ASID_POOL_BITS/ASID_POOL_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices

SELFOUR-554: Update archCapIsPhysical

VCPU and IO page table caps were not added to archCapisPhysical,
this commit fixes that and marks them as physical objects

arm-hyp: Remove EXPECTED_TCB_SIZE

This definition was removed from master

SELFOUR-516 Remove EXPECTED_TCB_SIZE

Explicitly check if a capability is physical or not

Previously the return value of cap_get_capPtr was compared to 0 in
sameRegionAs to emulate a check in the abstract specification that
tests if the cap is a physical cap or not. Overloading 0 results
in a scenario where a legitimate deviceUntyped's children do not
get considered to be children because they have a capPtr of 0.

This change adds and explicit function that returns whether or not
a capability is physical or not, and uses that in sameRegionAs

arm-hyp: Hide iospace caps being #ifdef

These cap type existing, even if unused, break the original verification

arm-hyp: Minor cleanups

Cleanup some small licensing, whitespace and configuration details

arm-hyp/tk1: address review comments.

arm-hyp/tk1: fix bugs found during testing

arm/tk1: connect objects with SMMU invocations

arm/tk1: a checkpoint for SMMU implementation

SELFOUR-399: object sizes and globals frame addr should come from the same source

Rearranging headers for aarch32 to 32/mode/*