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9892:59a0cc07a7b3 |
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17-Jun-2009 |
Rafael Vanoni <rafael.vanoni@sun.com> |
6847706 ::pg uses cmt class name before reading class, cmt_hint obsolete
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8906:e559381f1e2b |
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25-Feb-2009 |
Eric Saxe <Eric.Saxe@Sun.COM> |
PSARC 2008/777 cpupm keyword mode extensions PSARC 2008/663 CPU Deep Idle Keyword 6567156 bring CPU power awareness to the dispatcher 6700904 deeper C-State support required on follow-ons to Intel Penryn processor generation microarchitecture 6805661 cmt_root may contain duplicates on UMA systems
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5079:2505799f46a8 |
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17-Sep-2007 |
jc25722 |
6601648 MPO changes should not have added reference to routine tsb_lgrp_affinity in common header file 6602344 Niagara1 machines think of themselves as NUMA 6602360 mdb, kstat updates needed post 6539930 6602440 physical processor view (psrinfo -vp) not supported on N1 post 6539930 6603355 MPO for sun4v platforms causes a panic when the number of mblocks > 1 and # of lgroups <= 1
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#
3434:5142e1d7d0bc |
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17-Jan-2007 |
esaxe |
6461311 multi-level CMT scheduling optimizations 6509639 cpu0 is not in the right chip_t if its chipid is not zero
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#
9892:59a0cc07a7b3 |
|
17-Jun-2009 |
Rafael Vanoni <rafael.vanoni@sun.com> |
6847706 ::pg uses cmt class name before reading class, cmt_hint obsolete
|
#
8906:e559381f1e2b |
|
25-Feb-2009 |
Eric Saxe <Eric.Saxe@Sun.COM> |
PSARC 2008/777 cpupm keyword mode extensions PSARC 2008/663 CPU Deep Idle Keyword 6567156 bring CPU power awareness to the dispatcher 6700904 deeper C-State support required on follow-ons to Intel Penryn processor generation microarchitecture 6805661 cmt_root may contain duplicates on UMA systems
|
#
5079:2505799f46a8 |
|
17-Sep-2007 |
jc25722 |
6601648 MPO changes should not have added reference to routine tsb_lgrp_affinity in common header file 6602344 Niagara1 machines think of themselves as NUMA 6602360 mdb, kstat updates needed post 6539930 6602440 physical processor view (psrinfo -vp) not supported on N1 post 6539930 6603355 MPO for sun4v platforms causes a panic when the number of mblocks > 1 and # of lgroups <= 1
|
#
3434:5142e1d7d0bc |
|
17-Jan-2007 |
esaxe |
6461311 multi-level CMT scheduling optimizations 6509639 cpu0 is not in the right chip_t if its chipid is not zero
|