8165381: Update for x86 SHA512 using AVX2
Summary: Add intrinsics for x86 AVX2 architecture with no SHA instructions.
Reviewed-by: kvn
Contributed-by: smita.kamath@intel.com

8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
Reviewed-by: kvn

8152907: Update for x86 tan and log10 in the math lib
Summary: Optimize Math.tan() and log10() for 64 and 32 bit X86 architecture using Intel LIBM implementation.
Reviewed-by: kvn, twisti
Contributed-by: shravya.rukmannagari@intel.com

8150767: Enables SHA Extensions on x86
Summary: Add x86 intrinsics for SHA-1 and SHA-256.
Reviewed-by: kvn, twisti
Contributed-by: vivek.r.deshpande@intel.com, shravya.rukmannagari@intel.com

8143925: Enhancing CounterMode.crypt() for AES
Summary: Add intrinsic for CounterMode.crypt() to leverage the parallel nature of AES in Counter(CTR) Mode.
Reviewed-by: kvn, ascarpino
Contributed-by: kishor.kharbas@intel.com

8140482: Various minor code improvements (runtime)
Reviewed-by: dholmes, coleenp, sspitsyn, dsamersoff

8134553: CRC32C implementations for x86/x64 targets
Reviewed-by: kvn
Contributed-by: tomasz.wojtowicz@intel.com

8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
Reviewed-by: kvn, jrose

7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
Summary: add intrinsics using new instruction to interpreter, C1, C2, for suitable x86; add test
Reviewed-by: kvn, twisti